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/Zephyr-latest/modules/hal_nordic/nrfx/
DKconfig21 bool "Two stage start sequence of the low frequency clock"
/Zephyr-latest/doc/develop/application/
Dindex.rst779 will use in the second stage.
780 The second stage runs the native build tool to actually build the
/Zephyr-latest/soc/espressif/esp32c6/
Ddefault.ld13 /* The "user_sram_end" represents the 2nd stage bootloader
/Zephyr-latest/soc/espressif/esp32s2/
Ddefault.ld15 /* The "user_iram_end" represents the 2nd stage bootloader
/Zephyr-latest/doc/security/
Dsecurity-overview.rst348 and validation phase. In each stage, appropriate documentation
/Zephyr-latest/doc/kernel/services/
Dinterrupts.rst474 Any relocation on this stage may lead to the situation where the entry in the interrupt array
/Zephyr-latest/drivers/usb/udc/
Dudc_dwc2.c884 if (data->stage == CTRL_PIPE_STAGE_ERROR) { in dwc2_handle_evt_dout()
/Zephyr-latest/doc/releases/
Drelease-notes-3.7.rst398 using a single binary image without a 2nd stage bootloader.
1638 generated with Zephyr link stage executable on supported architectures.
Drelease-notes-1.13.rst494 * :github:`8610` - USB: Setup stage in control transfers
Drelease-notes-3.5.rst907 * Moved PPP L2 out of experimental stage.
Drelease-notes-2.4.rst725 early experimental draft at this stage.
Drelease-notes-2.6.rst199 * Added support for clearing NXP MPU region configuration during Zephyr early boot stage.
/Zephyr-latest/cmake/modules/
Dextensions.cmake5549 # The following functions simplify access to the compilation/link stage

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