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/Zephyr-latest/samples/drivers/adc/adc_dt/boards/
Dgd32l233r_eval.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1015_evk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1020_evk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1024_evk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1050_evk_mimxrt1052_hyperflash.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1060_evk_mimxrt1062_qspi_C.overlay9 /* adjust channel number according to pinmux in board.dts */
Dnucleo_u575zi_q.overlay6 /* adjust channel number according to pinmux in board.dts */
Ddisco_l475_iot1.overlay9 /* adjust channel number according to pinmux in board.dts */
Dfrdm_k64f.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1010_evk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1060_evk_mimxrt1062_qspi.overlay9 /* adjust channel number according to pinmux in board.dts */
Dmimxrt1064_evk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dnucleo_h7a3zi_q.overlay6 /* adjust channel number according to pinmux in board.dts */
Dnucleo_l552ze_q.overlay9 /* adjust channel number according to pinmux in board.dts */
Dnucleo_wl55jc.overlay9 /* adjust channel number according to pinmux in board.dts */
Dstm32h573i_dk.overlay9 /* adjust channel number according to pinmux in board.dts */
Dstm32h735g_disco.overlay6 /* adjust channel number according to pinmux in board.dts */
Dstm32l496g_disco.overlay6 /* adjust channel number according to pinmux in board.dts */
Dstm32l562e_dk.overlay9 /* adjust channel number according to pinmux in board.dts */
/Zephyr-latest/drivers/i3c/
DKconfig82 Define the maximum number of IBIs that can be
124 This is the number of memory slabs allocated from when
132 This is the number of memory slabs allocated from when
150 submission queue. The queue depth determines the number of possible i3c_msg
160 submission queue. The queue depth determines the number of possible i3c_msg
171 are given to i3c_transfer. This requires some number of msgs be available to convert
/Zephyr-latest/kernel/
DKconfig.smp42 int "Maximum number of CPUs/cores"
46 Maximum number of multiprocessing-capable cores available to the
89 O(N) in the number of CPUs, and in exchange reduces the number of
93 reduce the number of IPIs (and consequently ISRs) processed by the
94 system as the number of CPUs increases. If not, the only benefit
/Zephyr-latest/drivers/dma/
DKconfig.mcux_edma34 int "number of TCD in a queue for SG mode"
37 number of TCD in a queue for SG mode
/Zephyr-latest/soc/microchip/mec/mec174x/
DKconfig.defconfig.series9 # must be >= the highest interrupt number used
/Zephyr-latest/soc/microchip/mec/mec175x/
DKconfig.defconfig.series9 # must be >= the highest interrupt number used
/Zephyr-latest/soc/microchip/mec/mech172x/
DKconfig.defconfig.series9 # must be >= the highest interrupt number used

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