Searched refs:multi (Results 76 – 100 of 198) sorted by relevance
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102 application is combined with MCUboot multi-image boot.
15 multi-regional use and GNSS capabilities via an integrated u-blox M8 GNSS
93 Here is an example. For details, see :ref:`west-multi-domain-builds` in113 Since sysbuild supports both single- and multi-image builds, this lets you290 For more details, see :ref:`west-multi-domain-flashing`.303 For more details, see :ref:`west-multi-domain-debugging`.497 * A specific core on a physical board with a multi-core SoC, such as729 Sometimes, in a multi-image build, you may want certain Zephyr applications to771 You can include non-Zephyr applications in a multi-image build using the
42 * Concurrent multi-protocol support ready
9 Unlike other multi-purpose POSIX operating systems
63 Note that NVME requires the target to support PCIe multi-vector MSI-X in order to function.
7 Internet of Things board based on the SimpleLink multi-Standard CC1352P7 wireless MCU.
6 The MSPI (multi-bit SPI) is provided as a generic API to accommodate21 Zephyr's MSPI controller API may be used when a multi-bit SPI controller
115 applications that want to destroy a multi heap should simply ensure124 uninspected by the multi heap code itself; instead it is passed to a137 When unused, a multi heap may be freed via
7 quad-core ARM Cortex-A53 SoC with an external TI SimpleLink multi-standard CC1352P7 wireless MCU
38 As another example, consider a device with a 2.4GHz, multi-protocol radio
628 static void multi(void *p1, void *p2, void *p3) in multi() function673 multi, 0, 0, 0, main_low_prio - 1, in ZTEST()
18 - 29 × multi-function GPIO pins (20× via edge pinout, others via solder points).
91 COMMAND ${CMAKE_C_COMPILER} ${TOOLCHAIN_C_FLAGS} --print-multi-directory
254 Info : fpgasoc.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT290 Info : fpgasoc.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT317 Info : fpgasoc.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
65 Set to operate in multi-LED mode. The green, red, and/or IR LED
10 This is a simple application demonstrating a Bluetooth Mesh multi-element node.
147 design and capabilities. For example, multi-processing, ad-hoc memory-mapping, multiple users,
19 multi-axis device have been reported.
9 configuring when commands are ran for groups of board targets. As an example: a multi-core SoC
89 PSE52. Additionally, it includes interfaces for POSIX multi-processing, networking, pipes,
236 '--sysbuild[create multi-domain build system]'237 '--no-sysbuild[do not create multi-domain build system]'
80 the necessary multi-level page tables for code execution and data access
10 An implementation of a solution to the Dining Philosophers problem (a classic multi-thread
29 Endpoint prioritization and multi-instance ability highly depend on the backend
