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Searched refs:mask (Results 201 – 225 of 837) sorted by relevance

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/Zephyr-latest/drivers/input/
Dinput_kbd_matrix.c185 kbd_row_t mask = BIT(r); in input_kbd_matrix_update_state() local
186 kbd_row_t row_bit = matrix_new_state[c] & mask; in input_kbd_matrix_update_state()
189 if (!(deb_col & mask)) { in input_kbd_matrix_update_state()
206 cfg->matrix_unstable_state[c] &= ~mask; in input_kbd_matrix_update_state()
209 if ((cfg->matrix_stable_state[c] & mask) == row_bit) { in input_kbd_matrix_update_state()
219 cfg->matrix_stable_state[c] ^= mask; in input_kbd_matrix_update_state()
/Zephyr-latest/drivers/wifi/esp_at/
Desp.h133 #define ESP_CMD_SET_IP(ip, gateway, mask) "AT+"_CIPSTA"=\"" \ argument
134 ip "\",\"" gateway "\",\"" mask "\""
156 #define ESP_CMD_CWLAPOPT(sort, mask) "AT+CWLAPOPT=" sort "," mask argument
297 atomic_val_t mask) in esp_socket_flags_update() argument
303 } while (!atomic_cas(&sock->flags, flags, (flags & ~mask) | value)); in esp_socket_flags_update()
/Zephyr-latest/drivers/sensor/bosch/bmi08x/
Dbmi08x.h560 uint8_t mask, uint8_t val);
561 static inline int bmi08x_accel_reg_update(const struct device *dev, uint8_t reg_addr, uint8_t mask, in bmi08x_accel_reg_update() argument
564 return bmi08x_accel_reg_field_update(dev, reg_addr, 0, mask, val); in bmi08x_accel_reg_update()
572 uint8_t mask, uint8_t val);
573 static inline int bmi08x_gyro_reg_update(const struct device *dev, uint8_t reg_addr, uint8_t mask, in bmi08x_gyro_reg_update() argument
576 return bmi08x_gyro_reg_field_update(dev, reg_addr, 0, mask, val); in bmi08x_gyro_reg_update()
/Zephyr-latest/drivers/gpio/
Dgpio_rcar.c84 uint32_t pending, fsb, mask; in gpio_rcar_port_isr() local
87 mask = gpio_rcar_read(dev, INTMSK); in gpio_rcar_port_isr()
160 gpio_port_pins_t mask, in gpio_rcar_port_set_masked_raw() argument
166 port_val = (port_val & ~mask) | (value & mask); in gpio_rcar_port_set_masked_raw()
Dgpio_xmc4xxx.c158 static int gpio_xmc4xxx_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, in gpio_xmc4xxx_set_masked_raw() argument
165 mask &= pin_mask; in gpio_xmc4xxx_set_masked_raw()
168 port->OMR = (value & mask) | (~value & mask) << 16; in gpio_xmc4xxx_set_masked_raw()
Dgpio_mchp_mec5.c284 static int gpio_mec5_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) in gpio_mec5_port_set_masked_raw() argument
288 int ret = mec_hal_gpio_parout_port_mask(port_num, value, (const uint32_t)mask); in gpio_mec5_port_set_masked_raw()
297 static int gpio_mec5_port_set_bits_raw(const struct device *dev, uint32_t mask) in gpio_mec5_port_set_bits_raw() argument
301 int ret = mec_hal_gpio_parout_port_set_bits(port_num, (const uint32_t)mask); in gpio_mec5_port_set_bits_raw()
310 static int gpio_mec5_port_clear_bits_raw(const struct device *dev, uint32_t mask) in gpio_mec5_port_clear_bits_raw() argument
314 int ret = mec_hal_gpio_parout_port_mask(port_num, 0u, (const uint32_t)mask); in gpio_mec5_port_clear_bits_raw()
323 static int gpio_mec5_port_toggle_bits(const struct device *dev, uint32_t mask) in gpio_mec5_port_toggle_bits() argument
328 if (mec_hal_gpio_parout_port_xor(port_num, mask) != MEC_RET_OK) { in gpio_mec5_port_toggle_bits()
/Zephyr-latest/drivers/adc/
Dadc_rpi_pico.c142 uint32_t mask; in adc_rpi_check_buffer_size() local
144 for (mask = BIT(config->num_channels - 1); mask != 0; mask >>= 1) { in adc_rpi_check_buffer_size()
145 if (mask & sequence->channels) { in adc_rpi_check_buffer_size()
Dadc_cc32xx.c235 unsigned long mask = MAP_ADCIntStatus(config->base, chan); in adc_cc32xx_isr() local
239 MAP_ADCIntClear(config->base, chan, mask); in adc_cc32xx_isr()
241 if ((mask & ADC_FIFO_EMPTY) || !(mask & ADC_FIFO_FULL)) { in adc_cc32xx_isr()
256 LOG_DBG("ISR %d, 0x%lX %d %d", chan, mask, rv, cnt); in adc_cc32xx_isr()
/Zephyr-latest/drivers/sensor/maxim/max44009/
Dmax44009.c57 uint8_t mask, uint8_t val) in max44009_reg_update() argument
66 new_val = old_val & ~mask; in max44009_reg_update()
67 new_val |= val & mask; in max44009_reg_update()
/Zephyr-latest/drivers/sensor/nxp/fxls8974/
Dfxls8974.h112 uint8_t mask,
172 uint8_t mask,
191 uint8_t mask,
/Zephyr-latest/drivers/sensor/adi/adxl367/
Dadxl367_i2c.c65 uint32_t mask, in adxl367_i2c_reg_write_mask() argument
76 tmp &= ~mask; in adxl367_i2c_reg_write_mask()
/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372_i2c.c67 uint32_t mask, in adxl372_i2c_reg_write_mask() argument
78 tmp &= ~mask; in adxl372_i2c_reg_write_mask()
Dadxl372.c141 uint8_t mask; in adxl372_set_bandwidth() local
145 mask = ADXL372_POWER_CTL_LPF_DIS_MSK; in adxl372_set_bandwidth()
147 mask = 0U; in adxl372_set_bandwidth()
151 ADXL372_POWER_CTL_LPF_DIS_MSK, mask); in adxl372_set_bandwidth()
158 data->pwr_reg |= mask; in adxl372_set_bandwidth()
182 uint8_t mask; in adxl372_set_hpf_corner() local
186 mask = ADXL372_POWER_CTL_HPF_DIS_MSK; in adxl372_set_hpf_corner()
188 mask = 0U; in adxl372_set_hpf_corner()
192 ADXL372_POWER_CTL_HPF_DIS_MSK, mask); in adxl372_set_hpf_corner()
199 data->pwr_reg |= mask; in adxl372_set_hpf_corner()
/Zephyr-latest/drivers/sensor/bosch/bma4xx/
Dbma4xx_i2c.c54 uint8_t mask, uint8_t value) in bma4xx_i2c_update_reg() argument
58 return i2c_reg_update_byte_dt(&cfg->bus_cfg.i2c, reg_addr, mask, value); in bma4xx_i2c_update_reg()
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32u0_clock.h61 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
64 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
Dstm32wba_clock.h71 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
74 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
/Zephyr-latest/subsys/logging/
Dlog_core.c293 static uint32_t activate_foreach_backend(uint32_t mask) in activate_foreach_backend() argument
295 uint32_t mask_cpy = mask; in activate_foreach_backend()
303 mask &= ~BIT(i); in activate_foreach_backend()
310 return mask; in activate_foreach_backend()
315 uint32_t mask = 0; in z_log_init() local
346 mask |= BIT(backend_index); in z_log_init()
355 while (mask) { in z_log_init()
356 mask = activate_foreach_backend(mask); in z_log_init()
363 return mask; in z_log_init()
/Zephyr-latest/drivers/sensor/st/lis2dh/
Dlis2dh_trigger.c227 uint8_t reg = 0, mask = 0, val = 0; in lis2dh_start_trigger_int2() local
245 mask = cfg->hw.anym_on_int1 ? LIS2DH_EN_IA_INT1 : LIS2DH_EN_IA_INT2; in lis2dh_start_trigger_int2()
246 val = has_anym ? mask : 0; in lis2dh_start_trigger_int2()
247 status = lis2dh->hw_tf->update_reg(dev, reg, mask, val); in lis2dh_start_trigger_int2()
255 mask = LIS2DH_EN_CLICK_XS | LIS2DH_EN_CLICK_YS | LIS2DH_EN_CLICK_ZS; in lis2dh_start_trigger_int2()
256 val = has_anyt ? mask : 0; in lis2dh_start_trigger_int2()
257 status = lis2dh->hw_tf->update_reg(dev, reg, mask, val); in lis2dh_start_trigger_int2()
265 mask = cfg->hw.anym_on_int1 ? LIS2DH_EN_CLICK_INT1 : LIS2DH_EN_CLICK_INT2; in lis2dh_start_trigger_int2()
266 val = has_anyt ? mask : 0; in lis2dh_start_trigger_int2()
267 status = lis2dh->hw_tf->update_reg(dev, reg, mask, val); in lis2dh_start_trigger_int2()
Dlis2dh_i2c.c58 uint8_t mask, uint8_t value) in lis2dh_i2c_update_reg() argument
62 return i2c_reg_update_byte_dt(&cfg->bus_cfg.i2c, reg_addr, mask, value); in lis2dh_i2c_update_reg()
/Zephyr-latest/samples/subsys/edac/
DREADME.rst69 mask :Get / Set address mask
86 uart:~$ edac inject mask 0x7fffffffc0
87 Set injection address mask to 7fffffffc0
/Zephyr-latest/drivers/interrupt_controller/
Dintc_miwu.c103 static void intc_miwu_dispatch_isr(sys_slist_t *cb_list, uint8_t mask) in intc_miwu_dispatch_isr() argument
110 if (BIT(cb->io_cb.params.wui.bit) & mask) { in intc_miwu_dispatch_isr()
118 if (BIT(cb->dev_cb.params.wui.bit) & mask) { in intc_miwu_dispatch_isr()
150 uint8_t mask = NPCX_WKPND(base, wui_group) & NPCX_WKEN(base, wui_group); in intc_miwu_isr_pri() local
153 uint8_t new_mask = mask; in intc_miwu_isr_pri()
168 if (mask) { in intc_miwu_isr_pri()
169 NPCX_WKPCL(base, wui_group) = mask; in intc_miwu_isr_pri()
174 intc_miwu_dispatch_isr(&data->cb_list_grp[wui_group], mask); in intc_miwu_isr_pri()
/Zephyr-latest/boards/shields/arduino_uno_click/
Darduino_uno_click.overlay11 gpio-map-mask = <0xffffffff 0xffffffc0>;
34 gpio-map-mask = <0xffffffff 0xffffffc0>;
/Zephyr-latest/drivers/sensor/tdk/icm42688/
Dicm42688_spi.h38 int icm42688_spi_update_register(const struct spi_dt_spec *bus, uint16_t reg, uint8_t mask,
/Zephyr-latest/drivers/rtc/
Drtc_rv8263.c389 static int rv8263c8_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, in rv8263c8_alarm_set_time() argument
398 if ((mask > 0) && (timeptr == NULL)) { in rv8263c8_alarm_set_time()
402 if (!rtc_utils_validate_rtc_time(timeptr, mask)) { in rv8263c8_alarm_set_time()
407 if (mask == 0) { in rv8263c8_alarm_set_time()
424 if (mask & RTC_ALARM_TIME_MASK_SECOND) { in rv8263c8_alarm_set_time()
430 if (mask & RTC_ALARM_TIME_MASK_MINUTE) { in rv8263c8_alarm_set_time()
436 if (mask & RTC_ALARM_TIME_MASK_HOUR) { in rv8263c8_alarm_set_time()
442 if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { in rv8263c8_alarm_set_time()
448 if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { in rv8263c8_alarm_set_time()
460 if (mask != 0) { in rv8263c8_alarm_set_time()
/Zephyr-latest/include/zephyr/drivers/firmware/scmi/
Dshmem.h58 uint32_t mask, uint32_t val);

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