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/Zephyr-latest/soc/intel/intel_adsp/common/
Dboot.c127 struct sof_man_fw_header *hdr = &desc->header; in parse_manifest()
/Zephyr-latest/soc/mediatek/mt8xxx/
Dgen_img.py63 h = seg.header
/Zephyr-latest/soc/nuvoton/npcx/common/
DCMakeLists.txt10 # Check for disabling header CRC.
/Zephyr-latest/drivers/sensor/memsic/mmc56x3/
Dmmc56x3_async.c44 edata->header.timestamp = sensor_clock_cycles_to_ns(cycles); in mmc56x3_submit_sync()
Dmmc56x3.h124 struct mmc56x3_decoder_header header; member
/Zephyr-latest/boards/shields/ssd1306/doc/
Dindex.rst12 connected to the pin header of a board using jumper wires.
/Zephyr-latest/scripts/build/
Dgen_image_info.py39 segment_header = segment['segment'].header
/Zephyr-latest/soc/microchip/mec/common/spigen/
Dmec_spi_gen.py399 header = build_header(chip, spi_config_info, HDR_SPI_LOC, PLD_SPI_LOC, entry_point, indata_len)
402 print_bytes("HEADER", header)
432 spi_bufs.append(("HEADER", HDR_SPI_LOC, header))
/Zephyr-latest/boards/weact/stm32g431_core/doc/
Dindex.rst56 | SB1/SB2 | Open | Route PC14/PC15 (LSE) to header |
107 The board can be debugged by installing the included 100 mil (0.1 inch) header, and
108 attaching an SWD debugger to the 3V3 (3.3V), GND, SCK, and DIO pins on that header.
/Zephyr-latest/doc/services/debugging/
Dsymtab.rst16 …ication can gain access to the symbol table data structure by including the :file:`symtab.h` header
/Zephyr-latest/boards/ambiq/apollo3_evb/
Dapollo3_evb_connector.dtsi9 compatible = "ambiq-header";
/Zephyr-latest/samples/subsys/display/cfb_custom_font/
DREADME.rst13 a PNG image, and then uses the generated header (``cfb_font_dice.h``)
/Zephyr-latest/doc/develop/sca/
Dcodechecker.rst40 :header-rows: 1
84 :header-rows: 1
/Zephyr-latest/boards/shields/rtkmipilcdb00000be/doc/
Dindex.rst12 This display uses a 26 pin connector header.
/Zephyr-latest/drivers/usb_c/tcpc/
Ducpd_stm32_priv.h218 uint16_t header; member
/Zephyr-latest/boards/cypress/cy8ckit_062_ble/
Dcy8ckit_062_ble_common.dtsi34 compatible = "arduino-header-r3";
/Zephyr-latest/boards/infineon/cy8ckit_062s4/
Dcy8ckit_062s4.dts33 compatible = "arduino-header-r3";
/Zephyr-latest/boards/shields/adafruit_2_8_tft_touch_v2/boards/
Drd_rw612_bga.overlay37 * Display can be connected to Arduino header
/Zephyr-latest/samples/subsys/sip_svc/src/
Dmain.c69 request.header = SIP_SVC_PROTO_HEADER(SIP_SVC_PROTO_CMD_ASYNC, 0); in main()
/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372_decoder.c51 data->header.base_timestamp_ns = enc_data->timestamp; in adxl372_decode_stream()
52 data->header.reading_count = 1; in adxl372_decode_stream()
/Zephyr-latest/boards/olimex/stm32_h405/doc/
Dindex.rst80 EXT1 header
96 EXT2 header
/Zephyr-latest/boards/seeed/lora_e5_dev_board/
Dlora_e5_dev_board.dts59 * and for external devices(Grove, header).
71 * Available for external devices on header J2
/Zephyr-latest/subsys/canbus/isotp/
DKconfig74 header (sizeof(struct net_buf)) amount of data.
92 Each buffer will occupy CAN_MAX_DLEN - 1 byte + header (sizeof(struct net_buf))
108 header (sizeof(struct net_buf)) amount of data. If context buffers
/Zephyr-latest/boards/atmel/sam/sam_v71_xult/
Dsam_v71_xult-common.dtsi75 compatible = "atmel-xplained-pro-header";
100 compatible = "atmel-xplained-pro-header";
125 compatible = "arduino-header-r3";
/Zephyr-latest/boards/fanke/fk7b0m1_vbt6/doc/
Dindex.rst50 - SWD and serial port accessibility through a pin header
108 - UART_1 TX/RX : PA9/PA10 (available on the header pins)
139 The board provides header pins for the Serial Wire Debug (SWD) interface.

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