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/Zephyr-latest/boards/particle/argon/doc/
Dindex.rst69 Please see the `Argon Datasheet`_ for header pin assignments, which are
101 * TWI0 enabled on labeled header (SDA/SCL)
115 * UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
/Zephyr-latest/boards/particle/xenon/doc/
Dindex.rst68 Please see the `Xenon Datasheet`_ for header pin assignments, which are
102 * TWI0 enabled on labeled header (SDA/SCL)
116 * UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
/Zephyr-latest/drivers/sensor/memsic/mmc56x3/
Dmmc56x3_async.c35 edata->header.timestamp = k_ticks_to_ns_floor64(k_uptime_ticks()); in mmc56x3_submit_sync()
/Zephyr-latest/include/zephyr/drivers/misc/
DREADME7 This directory contains header files of the Miscellaneous Drivers.
/Zephyr-latest/boards/phytec/phyboard_pollux/
Dphyboard_pollux_mimx8ml8_m7.dts41 * Expansion header Pin 31(RX) 33(TX)
/Zephyr-latest/doc/connectivity/networking/
Dnet-stack-architecture.rst63 Some of these technologies support IPv6 header compression (6Lo),
102 header and frame check sequence, etc.
136 3. Depending on the socket type, a protocol header is added in front of the
137 data. For example, if the socket is a UDP socket, then a UDP header is
140 4. An IP header is added to the network packet for a UDP or TCP packet.
/Zephyr-latest/subsys/input/
Dinput_utils.c131 static void kbd_matrix_state_log_entry(char *header, kbd_row_t *data) in kbd_matrix_state_log_entry() argument
164 kbd_matrix_state_dev->name, header, kbd_matrix_buf, count); in kbd_matrix_state_log_entry()
/Zephyr-latest/drivers/sensor/adi/adxl345/
Dadxl345_decoder.c104 data->header.base_timestamp_ns = enc_data->timestamp; in adxl345_decode_stream()
105 data->header.reading_count = 1; in adxl345_decode_stream()
/Zephyr-latest/boards/starfive/visionfive2/doc/
Dindex.rst23 is a jh7110 signature tool used to generate spl header information
31 This step is necessary as zephyr binary must contain the SPL header info in order
/Zephyr-latest/doc/connectivity/networking/api/
Dwifi.rst33 Wi-Fi Enterprise test: X.509 Certificate header generation
38 build process the certificates are converted to a C header file that is included by the Wi-Fi shell
/Zephyr-latest/modules/hal_gigadevice/
DCMakeLists.txt23 # The header files of GigaDevice firmware are reference HXTAL_VALUE.
25 # via that header files.
/Zephyr-latest/tests/net/lib/wifi_credentials_backend_psa/src/
Dmain.c54 .header = {
66 .header = {
/Zephyr-latest/tests/net/lib/wifi_credentials_backend_settings/src/
Dmain.c51 .header = {
63 .header = {
/Zephyr-latest/doc/services/device_mgmt/smp_groups/
Dsmp_group_1.rst69 Get state of images request header fields:
87 Get state of images response header fields:
168 | "hash" | SHA256 hash of the image header and body. Note that this will not be |
223 Set state of image request header fields:
265 Image upload request header fields:
346 Image upload response header fields:
430 Image erase request header fields:
462 Image erase response header fields:
531 Slot info request header fields:
547 Slot info response header fields:
/Zephyr-latest/boards/shields/inventek_eswifi/doc/
Dindex.rst18 by the JTAG pin header.
28 can use 5V from Arduino header, if board provide it, J17 position 1-2.
45 To enable full control by Arduino header user should do some manual wiring.
51 available at header J26 pin 1 and shield configuration uses D7 to control that
/Zephyr-latest/doc/services/device_mgmt/
Dsmp_protocol.rst20 Each frame consists of a header and data. The ``Data Length`` field in the
21 header may be used for reassembly purposes if underlying transport layer supports
98 | | the header. |
158 other side of a request, a response should be issued containing the header
/Zephyr-latest/boards/shields/ssd1306/doc/
Dindex.rst12 connected to the pin header of a board using jumper wires.
/Zephyr-latest/soc/intel/intel_adsp/common/
Dboot.c127 struct sof_man_fw_header *hdr = &desc->header; in parse_manifest()
/Zephyr-latest/soc/mediatek/mt8xxx/
Dgen_img.py63 h = seg.header
/Zephyr-latest/soc/nuvoton/npcx/common/
DCMakeLists.txt10 # Check for disabling header CRC.
/Zephyr-latest/scripts/build/
Dgen_image_info.py39 segment_header = segment['segment'].header
/Zephyr-latest/soc/microchip/mec/common/spigen/
Dmec_spi_gen.py399 header = build_header(chip, spi_config_info, HDR_SPI_LOC, PLD_SPI_LOC, entry_point, indata_len)
402 print_bytes("HEADER", header)
432 spi_bufs.append(("HEADER", HDR_SPI_LOC, header))
/Zephyr-latest/boards/fanke/fk750m1_vbt6/doc/
Dindex.rst39 - SWD and serial port accessibility through a pin header
90 - UART_1 TX/RX : PA9/PA10 (available on the header pins)
120 The board provides header pins for the Serial Wire Debug (SWD) interface.
/Zephyr-latest/samples/subsys/display/cfb_custom_font/
DREADME.rst13 a PNG image, and then uses the generated header (``cfb_font_dice.h``)
/Zephyr-latest/doc/services/debugging/
Dsymtab.rst16 …ication can gain access to the symbol table data structure by including the :file:`symtab.h` header

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