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/Zephyr-4.1.0/soc/espressif/esp32c2/
DKconfig.mac24 …Note that ESP32-C6 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
/Zephyr-4.1.0/soc/espressif/esp32c3/
DKconfig.mac24 …Note that ESP32-C3 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
/Zephyr-4.1.0/soc/espressif/esp32c6/
DKconfig.mac24 …Note that ESP32-C6 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
/Zephyr-4.1.0/samples/psa/persistent_key/
DREADME.rst47 If the board target to compile for has an entropy driver (preferable):
/Zephyr-4.1.0/samples/sensor/grow_r502a/
DREADME.rst10 This sample has the below functionalities:
/Zephyr-4.1.0/samples/boards/nordic/nrfx/
DREADME.rst31 This sample has been tested on the NordicSemiconductor nRF9160 DK
/Zephyr-4.1.0/boards/we/oceanus1ev/doc/
Dindex.rst24 The board has below hardware features:
/Zephyr-4.1.0/samples/basic/servo_motor/
DREADME.rst55 The sample has a devicetree overlay for the :zephyr:board:`bbc_microbit`.
/Zephyr-4.1.0/cmake/toolchain/llvm/
Dgeneric.cmake23 # newlib or picolibc would be wrong. Same with stating that LLVM has newlib or Picolibc.
/Zephyr-4.1.0/boards/ti/lp_em_cc2340r5/doc/
Dindex.rst18 The CC2340R5 wireless MCU has a 48 MHz Arm |reg| Cortex |reg|-M0+ SoC and an
/Zephyr-4.1.0/boards/adafruit/itsybitsy/
Dadafruit_itsybitsy_nrf52840.dts127 has-dpd;
/Zephyr-4.1.0/doc/connectivity/canbus/
Disotp.rst37 many CF the sender is allowed to send, before he has to wait for another FC.
/Zephyr-4.1.0/boards/others/black_f407ve/
Dblack_f407ve.dts147 has-dpd;
/Zephyr-4.1.0/boards/mxchip/az3166_iotdevkit/doc/
Dindex.rst16 The MXChip AZ3166 IoT DevKit has the following physical features:
/Zephyr-4.1.0/doc/services/debugging/
Dmipi_stp_decoder.rst23 Decoder has internal state since there are dependency between opcodes (e.g. timestamp can be
/Zephyr-4.1.0/subsys/net/lib/wifi_credentials/
DKconfig54 but for example Linux 6.0 has a hardcoded limit of 128 bytes.
/Zephyr-4.1.0/drivers/ethernet/
DKconfig.dwmac60 buffers. Each RX fragment has a size of CONFIG_NET_BUF_DATA_SIZE.
/Zephyr-4.1.0/boards/arm/v2m_musca_s1/doc/
Dindex.rst103 Musca-S1 is a Cortex-M33 based SoC and has 15 fixed exceptions and 77 IRQs.
208 Musca-S1 has a built-in RGB LED connected to GPIO[4:2] pins.
219 V2M Musca-S1 has a 32.768kHz crystal clock. The clock goes to a PLL and is
228 The ARM Musca-S1 processor has two UARTs. Both the UARTs have only two wires
402 Once the file transfer has completed, you may reset the board.
/Zephyr-4.1.0/doc/build/dts/
Dphandles.rst227 Every phandle-array property has an associated *specifier space*. This sounds
229 follow each phandle in a hardware specific way. Every specifier space has a
266 With that, if ``phandle-array-prop-2`` has specifier space ``bob``, we could
305 - each phandle-array property has an associated specifier space
316 In general, a ``phandle-array`` property named ``foos`` implicitly has
/Zephyr-4.1.0/doc/develop/west/
Dbuilt-in.rst121 locally. This is the behavior when the ``-f`` (``--fetch``) option has its
197 If a project in the manifest has a ``submodules`` key, the submodules are
200 If the project has ``submodules: true``, west first synchronizes the project's
218 Otherwise, the project has ``submodules: <list-of-submodules>``. In this
244 West has a few more commands for managing the projects in the
/Zephyr-4.1.0/subsys/mgmt/mcumgr/grp/os_mgmt/
DKconfig40 command has been issued via an MCUmgr command. With this option
43 application will be notified that a reset command has been received
157 command has been issued via an MCUmgr command.
/Zephyr-4.1.0/boards/m5stack/m5stack_cores3/doc/
Dindex.rst7 M5Stack CoreS3 SE is the compact version of CoreS3. It has the same form factor as the original M5S…
203 After the board has automatically reset and booted, you should see the following
216 ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB…
/Zephyr-4.1.0/boards/seeed/lora_e5_dev_board/doc/
Dlora_e5_dev_board.rst74 LoRa-E5 Dev Board has 4 GPIO controllers. These controllers are responsible
120 The board has multiple power rails, which are always turned on in the default
169 firmware, from which seeed studio has neither released the source code nor a binary.
/Zephyr-4.1.0/boards/arm/mps2/doc/
Dmps2_armv7m.rst103 MPS2 is a Cortex-M based SoC and has 15 fixed exceptions and 45 IRQs.
145 The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible
243 The V2M MPS2 processor has five UARTs. Both the UARTs have only two wires for
/Zephyr-4.1.0/boards/nxp/mimxrt1020_evk/doc/
Dindex.rst58 This platform has the following external memories:
123 The MIMXRT1020 SoC has five pairs of pinmux/gpio controllers.
208 The MIMXRT1020 SoC has eight UARTs. ``LPUART1`` is configured for the console,

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