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/Zephyr-4.1.0/boards/arm/fvp_baser_aemv8r/
Dfvp_baser_aemv8r_fvp_aemv8r_aarch64.dts20 zephyr,flash = &flash0;
31 flash0: flash@88000000 {
32 compatible = "soc-nv-flash";
/Zephyr-4.1.0/tests/boot/test_mcuboot/
Dsysbuild.cmake17 # Add the swapped app to the list of images to flash
22 # This order means that if the debugger resets the MCU in between flash
24 # is actually present in flash.
/Zephyr-4.1.0/tests/drivers/flash_simulator/flash_sim_reboot/boards/
Dmps2_an385.overlay12 compatible = "zephyr,sim-flash";
20 compatible = "soc-nv-flash";
/Zephyr-4.1.0/boards/wch/ch32v003f4p6_dev_board/support/
Dopenocd.cfg10 set _FLASHNAME $_CHIPNAME.flash
12 flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
/Zephyr-4.1.0/dts/arm/st/u0/
Dstm32u031X4.dtsi24 flash-controller@40022000 {
25 flash0: flash@8000000 {
Dstm32u031X6.dtsi24 flash-controller@40022000 {
25 flash0: flash@8000000 {
Dstm32u031X8.dtsi24 flash-controller@40022000 {
25 flash0: flash@8000000 {
Dstm32u083Xc.dtsi24 flash-controller@40022000 {
25 flash0: flash@8000000 {
/Zephyr-4.1.0/dts/arm/st/f4/
Dstm32f437Xi.dtsi22 flash-controller@40023c00 {
23 flash0: flash@8000000 {
/Zephyr-4.1.0/dts/arm/st/h7/
Dstm32h745Xi_m7.dtsi24 flash-controller@52002000 {
25 flash0: flash@8000000 {
Dstm32h755Xi_m7.dtsi24 flash-controller@52002000 {
25 flash0: flash@8000000 {
/Zephyr-4.1.0/doc/develop/flash_debug/
Dhost-tools.rst7 flash and debug Zephyr applications.
9 Zephyr's west tool has built-in support for all of these in its ``flash``,
12 file declares that support properly. See :ref:`west-build-flash-debug` for
27 The typical command to flash the board is:
31 west flash [ -r bossac ] [ -p /dev/ttyX ] [ --erase ]
35 By default, flashing with bossac will only erase the flash pages containing
37 erase the entire flash of the target when flashing, pass the ``--erase``
47 application, just run ``west flash`` to flash the board.
53 1. Define flash partitions required to accommodate the bootloader and
59 3. Build and flash the SAM-BA bootloader on the device.
[all …]
/Zephyr-4.1.0/boards/wch/ch32v003evt/support/
Dopenocd.cfg11 set _FLASHNAME $_CHIPNAME.flash
13 flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
/Zephyr-4.1.0/dts/arm/silabs/
Defm32gg11b820f2048gl192.dtsi20 flash-controller@40000000 {
21 flash0: flash@0 {
/Zephyr-4.1.0/samples/subsys/fs/fs_sample/
DREADME.rst11 system driver with SDHC card, SoC flash or external flash chip.
24 Requirements for setting up FAT FS on SoC flash
27 For the FAT FS to work with internal flash, the device needs to support erase
28 pages of size <= 4096 bytes and have at least 64kiB of flash available for
33 Requirements for setting up FAT FS on external flash
36 This type of configuration requires external flash device to be available
44 ``nrf52840dk/nrf52840`` using internal flash can be built using command:
/Zephyr-4.1.0/dts/riscv/wch/ch32v0/
Dch32v003.dtsi51 flash: flash-controller@40022000 { label
52 compatible = "wch,ch32v00x-flash-controller";
58 flash0: flash@0 {
59 compatible = "soc-nv-flash";
/Zephyr-4.1.0/boards/quicklogic/quick_feather/
Dquick_feather_defconfig14 # EOS S3 Configuration Manager copies software from external flash to MCU
16 # Thus we do not use flash directly.
/Zephyr-4.1.0/boards/common/
Dopenocd.board.cmake6 # "load_image" or "flash write_image erase"?
13 set_ifndef(OPENOCD_FLASH "flash write_image erase")
/Zephyr-4.1.0/dts/arm/st/l4/
Dstm32l4r5Xi.dtsi13 flash-controller@40022000 {
14 flash0: flash@8000000 {
/Zephyr-4.1.0/dts/arm/st/wb/
Dstm32wb55Xg.dtsi16 flash-controller@58004000 {
17 flash0: flash@8000000 {
/Zephyr-4.1.0/modules/hal_rpi_pico/
DCMakeLists.txt18 foreach(flash W25Q080 GENERIC_03H IS25LP080 W25X10CL AT25SF128A)
19 if(CONFIG_RP2_FLASH_${flash})
20 set(flash_type ${flash})
107 ${rp2_common_dir}/hardware_flash/flash.c
141 # Some flash driver functions must be executed from the RAM.
146 # A function in flash.c adds 1 to a function pointer, causing a warning
148 ${rp2_common_dir}/hardware_flash/flash.c
/Zephyr-4.1.0/doc/services/storage/fcb/
Dfcb.rst7 flash like a FIFO. You append entries to the end, and read data from the
19 Entries in the flash contain the length of the entry, the data within
22 Storage of entries in flash is done in a FIFO fashion. When you
25 oldest entry in flash.
31 an array of flash sectors; when it erases old data, it does this a
34 Entries in the flash are checksummed. That is how FCB detects whether
35 writing entry to flash completed ok. It will skip over entries which
/Zephyr-4.1.0/boards/nxp/mimxrt1010_evk/
DCMakeLists.txt14 "update your flash configuration data blocks")
17 # Include flash configuration block for RT1010 EVK from NXP's HAL.
18 # This configuration block may need modification if another flash chip is
/Zephyr-4.1.0/boards/nxp/mimxrt1015_evk/
DCMakeLists.txt13 "update your flash configuration data blocks")
16 # Include flash configuration block for RT1015 EVK from NXP's HAL.
17 # This configuration block may need modification if another flash chip is
/Zephyr-4.1.0/boards/nxp/mimxrt1170_evk/
Dmimxrt1170_evk_mimxrt1176_cm7_B.overlay9 zephyr,flash = &w25q512nw;
10 zephyr,flash-controller = &w25q512nw;
11 zephyr,flash = &w25q512nw;
23 /* RT1170 EVKB uses a different QSPI flash chip */

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