Searched refs:driven (Results 26 – 50 of 191) sorted by relevance
12345678
/Zephyr-latest/boards/others/candlelight/doc/ |
D | index.rst | 24 The STM32F072CB PLL is driven by the internal RC oscillator (HSI) running at 8 MHz and
|
/Zephyr-latest/samples/subsys/console/echo/ |
D | README.rst | 42 the (interrupt-driven) console device doesn't work as expected:
|
/Zephyr-latest/boards/vcc-gnd/yd_stm32h750vb/doc/ |
D | index.rst | 38 The STM32H750VB System Clock can be driven by an internal or external oscillator, 40 is driven by the PLL clock at 480MHz. PLL clock is feed by a 25MHz high speed external clock.
|
/Zephyr-latest/boards/fanke/fk7b0m1_vbt6/doc/ |
D | index.rst | 118 The FK7B0M1-VBT6 System Clock could be driven by an internal or external oscillator, 119 as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 280MHz, 120 driven by an 25MHz external crystal oscillator.
|
/Zephyr-latest/boards/st/stm32f072b_disco/doc/ |
D | index.rst | 97 STM32F072B-DISCO System Clock could be driven by internal or external 98 oscillator, as well as main PLL clock. By default System clock is driven 99 by PLL clock at 72 MHz, driven by internal 8 MHz oscillator.
|
/Zephyr-latest/boards/st/stm32f413h_disco/doc/ |
D | index.rst | 98 STM32F413H-DISCO System Clock could be driven by internal or external oscillator, 99 as well as main PLL clock. By default System clock is driven by PLL clock at 100MHz, 100 that is driven by the internal oscillator.
|
/Zephyr-latest/boards/st/stm32f412g_disco/doc/ |
D | index.rst | 97 STM32F412G-DISCO System Clock could be driven by internal or external oscillator, 98 as well as main PLL clock. By default System clock is driven by PLL clock at 100MHz, 99 driven internal oscillator.
|
/Zephyr-latest/boards/st/stm32f469i_disco/doc/ |
D | index.rst | 103 STM32F469I-DISCO System Clock could be driven by internal or external oscillator, 104 as well as main PLL clock. By default System clock is driven by PLL clock at 180MHz, 105 driven by 8MHz high speed external clock.
|
/Zephyr-latest/boards/st/stm32f723e_disco/doc/ |
D | index.rst | 90 The STM32F723E System Clock can be driven by an internal or external oscillator, 91 as well as by the main PLL clock. By default, the System clock is driven by the PLL 92 clock at 216MHz, driven by a 25MHz high speed external clock.
|
/Zephyr-latest/boards/blues/swan_r5/doc/ |
D | index.rst | 148 Swan System Clock could be driven by internal or external 150 driven by the PLL clock at 80MHz, driven by a 16MHz high speed
|
/Zephyr-latest/boards/st/nucleo_f446re/doc/ |
D | index.rst | 109 Nucleo F446RE System Clock could be driven by an internal or external oscillator, 110 as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz, 111 driven by an 8MHz high-speed external clock.
|
/Zephyr-latest/boards/st/nucleo_f411re/doc/ |
D | index.rst | 97 Nucleo F411RE System Clock could be driven by internal or external oscillator, 98 as well as main PLL clock. By default System clock is driven by PLL clock at 84MHz, 99 driven by 8MHz high speed external clock.
|
/Zephyr-latest/boards/others/canbardo/doc/ |
D | index.rst | 25 The SAME70N20B is driven by a 12 MHz crystal and configured to provide a system clock of 300
|
/Zephyr-latest/samples/drivers/uart/echo_bot/ |
D | README.rst | 14 The polling API is used for sending data and the interrupt-driven API
|
/Zephyr-latest/doc/services/rtio/ |
D | index.rst | 15 driven I/O. This section covers the RTIO API, queues, executor, iodev, 25 An application wishing to do complex DMA or interrupt driven operations today 37 Using DMA and/or interrupt driven I/O shouldn't dictate whether or not the 52 This model maps well to DMA and interrupt driven transfers. A request to do a 54 to the way hardware typically works with interrupt driven state machines 119 effect every io device can be viewed as an independent, event driven actor like
|
/Zephyr-latest/subsys/modem/backends/ |
D | Kconfig | 18 bool "Modem UART backend module interrupt driven implementation"
|
/Zephyr-latest/boards/fysetc/ucan/doc/ |
D | index.rst | 24 The STM32F072CB PLL is driven by an external crystal oscillator (HSE) running at 8 MHz and
|
/Zephyr-latest/doc/services/profiling/ |
D | perf.rst | 13 Timers are driven by interrupts, so the perf tracer function is called during an interruption.
|
/Zephyr-latest/samples/sensor/mhz19b/ |
D | README.rst | 17 interrupt driven API.
|
/Zephyr-latest/boards/seco/stm32f3_seco_d23/doc/ |
D | index.rst | 107 SECO SBC-3.5-PX30 System Clock could be driven by internal or external 108 oscillator, as well as main PLL clock. By default System clock is driven 109 by PLL clock at 72 MHz, driven by an external oscillator at 8 MHz.
|
/Zephyr-latest/boards/st/stm32f4_disco/doc/ |
D | index.rst | 112 STM32F4DISCOVERY System Clock could be driven by internal or external oscillator, 113 as well as main PLL clock. By default System clock is driven by PLL clock at 168MHz, 114 driven by 8MHz high speed external clock.
|
/Zephyr-latest/boards/st/stm32f411e_disco/doc/ |
D | index.rst | 84 STM32F411E-DISCO System Clock could be driven by an internal or external 86 driven by the PLL clock at 100MHz, driven by the internal oscillator.
|
/Zephyr-latest/boards/others/black_f407ve/doc/ |
D | index.rst | 139 BLACK_F407VE System Clock could be driven by internal or external oscillator, 140 as well as main PLL clock. By default System clock is driven by PLL clock 141 at 168MHz, driven by 8MHz high speed external clock.
|
/Zephyr-latest/boards/st/nucleo_f756zg/doc/ |
D | index.rst | 114 Nucleo F756ZG System Clock could be driven by an internal or external 116 driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock.
|
/Zephyr-latest/boards/st/nucleo_f429zi/doc/ |
D | index.rst | 121 The Nucleo F429ZI System Clock could be driven by an internal or external oscillator, 122 as well as by the main PLL clock. By default System clock is driven by PLL clock at 180MHz, 123 driven by an 8MHz high speed external clock.
|
12345678