| /Zephyr-latest/drivers/gpio/ |
| D | gpio_mcux_rgpio.c | 47 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_configure() local
142 RGPIO_WritePinOutput(base, pin, 1); in mcux_rgpio_configure()
146 RGPIO_WritePinOutput(base, pin, 0); in mcux_rgpio_configure()
149 WRITE_BIT(base->PDDR, pin, flags & GPIO_OUTPUT); in mcux_rgpio_configure()
156 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_get_raw() local
158 *value = base->PDIR; in mcux_rgpio_port_get_raw()
167 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_masked_raw() local
169 base->PDOR = (base->PDOR & ~mask) | (mask & value); in mcux_rgpio_port_set_masked_raw()
177 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_bits_raw() local
179 RGPIO_PortSet(base, mask); in mcux_rgpio_port_set_bits_raw()
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| /Zephyr-latest/soc/ite/ec/common/ |
| D | chip_chipregs.h | 1323 #define IT8XXX2_SMB_HOSTA(base) ECREG(base + 0x00) argument
1324 #define IT8XXX2_SMB_HOCTL(base) ECREG(base + 0x01) argument
1325 #define IT8XXX2_SMB_HOCMD(base) ECREG(base + 0x02) argument
1326 #define IT8XXX2_SMB_TRASLA(base) ECREG(base + 0x03) argument
1327 #define IT8XXX2_SMB_D0REG(base) ECREG(base + 0x04) argument
1328 #define IT8XXX2_SMB_D1REG(base) ECREG(base + 0x05) argument
1329 #define IT8XXX2_SMB_HOBDB(base) ECREG(base + 0x06) argument
1330 #define IT8XXX2_SMB_PECERC(base) ECREG(base + 0x07) argument
1331 #define IT8XXX2_SMB_SMBPCTL(base) ECREG(base + 0x0A) argument
1332 #define IT8XXX2_SMB_HOCTL2(base) ECREG(base + 0x10) argument
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| /Zephyr-latest/drivers/watchdog/ |
| D | wdt_mcux_wdog32.c | 24 WDOG_Type *base; member
46 WDOG_Type *base = config->base; in mcux_wdog32_setup() local
59 WDOG32_Init(base, &data->wdog_config); in mcux_wdog32_setup()
69 WDOG_Type *base = config->base; in mcux_wdog32_disable() local
71 WDOG32_Deinit(base); in mcux_wdog32_disable()
144 WDOG_Type *base = config->base; in mcux_wdog32_feed() local
151 WDOG32_Refresh(base); in mcux_wdog32_feed()
161 WDOG_Type *base = config->base; in mcux_wdog32_isr() local
164 flags = WDOG32_GetStatusFlags(base); in mcux_wdog32_isr()
165 WDOG32_ClearStatusFlags(base, flags); in mcux_wdog32_isr()
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_mcux_sctimer.c | 27 SCT_Type *base; member
65 SCTIMER_StopTimer(config->base, kSCTIMER_Counter_U); in mcux_sctimer_new_channel()
69 if (SCTIMER_SetupPwm(config->base, &data->channel[channel], in mcux_sctimer_new_channel()
76 SCTIMER_StartTimer(config->base, kSCTIMER_Counter_U); in mcux_sctimer_new_channel()
112 SCT_Type *base = config->base; in mcux_sctimer_pwm_set_cycles() local
115 SCTIMER_StopTimer(base, kSCTIMER_Counter_U); in mcux_sctimer_pwm_set_cycles()
119 base->OUTPUT &= ~(1UL << channel); in mcux_sctimer_pwm_set_cycles()
121 base->OUTPUT |= (1UL << channel); in mcux_sctimer_pwm_set_cycles()
179 SCTIMER_StopTimer(config->base, kSCTIMER_Counter_U); in mcux_sctimer_pwm_set_cycles()
180 config->base->MATCHREL[period_event] = period_cycles - 1U; in mcux_sctimer_pwm_set_cycles()
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| D | pwm_mcux_ftm.c | 31 FTM_Type *base; member
92 irqs = FTM_GetEnabledInterrupts(config->base); in mcux_ftm_set_cycles()
128 FTM_StopTimer(config->base); in mcux_ftm_set_cycles()
129 FTM_SetTimerPeriod(config->base, period_cycles); in mcux_ftm_set_cycles()
131 FTM_SetSoftwareTrigger(config->base, true); in mcux_ftm_set_cycles()
132 FTM_StartTimer(config->base, config->ftm_clock_source); in mcux_ftm_set_cycles()
135 status = FTM_SetupPwmMode(config->base, data->channel, in mcux_ftm_set_cycles()
141 FTM_SetSoftwareTrigger(config->base, true); in mcux_ftm_set_cycles()
167 if (FTM_GetEnabledInterrupts(config->base) & BIT(PAIR_2ND_CH(pair))) { in mcux_ftm_configure_capture()
238 if (FTM_GetEnabledInterrupts(config->base) & BIT(PAIR_2ND_CH(pair))) { in mcux_ftm_enable_capture()
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| /Zephyr-latest/drivers/sensor/nxp/mcux_lpcmp/ |
| D | mcux_lpcmp.c | 23 LPCMP_Type *base; member
75 config->base->CCR2 = ((config->base->CCR2 & (~LPCMP_CCR2_PSEL_MASK)) | in mcux_lpcmp_attr_set()
84 config->base->CCR2 = ((config->base->CCR2 & (~LPCMP_CCR2_MSEL_MASK)) | in mcux_lpcmp_attr_set()
95 config->base->DCR |= LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
97 config->base->DCR &= ~LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
106 LPCMP_SetDACConfig(config->base, &data->dac_config); in mcux_lpcmp_attr_set()
115 LPCMP_SetDACConfig(config->base, &data->dac_config); in mcux_lpcmp_attr_set()
124 LPCMP_SetDACConfig(config->base, &data->dac_config); in mcux_lpcmp_attr_set()
135 LPCMP_SetFilterConfig(config->base, &data->filter_config); in mcux_lpcmp_attr_set()
143 LPCMP_SetFilterConfig(config->base, &data->filter_config); in mcux_lpcmp_attr_set()
[all …]
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_mcux_lpi2c.c | 81 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_configure() local
118 LPI2C_MasterSetBaudRate(base, clock_freq, baudrate); in mcux_lpi2c_configure()
124 static void mcux_lpi2c_master_transfer_callback(LPI2C_Type *base, in mcux_lpi2c_master_transfer_callback() argument
131 ARG_UNUSED(base); in mcux_lpi2c_master_transfer_callback()
157 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_transfer() local
193 status = LPI2C_MasterTransferNonBlocking(base, in mcux_lpi2c_transfer()
200 LPI2C_MasterTransferAbort(base, &data->handle); in mcux_lpi2c_transfer()
212 LPI2C_MasterTransferAbort(base, &data->handle); in mcux_lpi2c_transfer()
218 if (0 != (base->MSR & LPI2C_MSR_NDF_MASK)) { in mcux_lpi2c_transfer()
219 LPI2C_MasterTransferAbort(base, &data->handle); in mcux_lpi2c_transfer()
[all …]
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| D | i2c_mcux.c | 26 ((I2C_Type *)((const struct i2c_mcux_config * const)(dev)->config)->base)
29 I2C_Type *base; member
54 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_configure() local
84 I2C_MasterSetBaudRate(base, baudrate, clock_freq); in i2c_mcux_configure()
97 static void i2c_mcux_master_transfer_callback(I2C_Type *base, in i2c_mcux_master_transfer_callback() argument
103 ARG_UNUSED(base); in i2c_mcux_master_transfer_callback()
112 I2C_MasterTransferAbort(base, &data->handle); in i2c_mcux_master_transfer_callback()
147 I2C_Type *base = DEV_BASE(dev); in i2c_mcux_transfer() local
180 status = I2C_MasterTransferNonBlocking(base, in i2c_mcux_transfer()
187 I2C_MasterTransferAbort(base, &data->handle); in i2c_mcux_transfer()
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| /Zephyr-latest/drivers/counter/ |
| D | counter_nxp_pit.c | 40 PIT_Type *base; member
66 return (config->base->CHANNEL[channel].LDVAL + 1); in nxp_pit_get_top_value()
75 PIT_EnableInterrupts(config->base, channel_id, in nxp_pit_start()
77 PIT_StartTimer(config->base, channel_id); in nxp_pit_start()
86 PIT_DisableInterrupts(config->base, channel_id, in nxp_pit_stop()
88 PIT_StopTimer(config->base, channel_id); in nxp_pit_stop()
98 *ticks = PIT_GetCurrentTimerCount(config->base, channel_id); in nxp_pit_get_value()
117 if (config->base->CHANNEL[channel].TCTRL & PIT_TCTRL_TEN_MASK) { in nxp_pit_set_top_value()
122 PIT_StopTimer(config->base, channel); in nxp_pit_set_top_value()
123 PIT_SetTimerPeriod(config->base, channel, cfg->ticks); in nxp_pit_set_top_value()
[all …]
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| /Zephyr-latest/drivers/sensor/nxp/nxp_tempmon/ |
| D | nxp_tempmon.c | 31 TEMPMON_Type *base; member
44 cfg->base->TEMPSENSE0 |= TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK; in nxp_tempmon_sample_fetch()
47 while (!(cfg->base->TEMPSENSE0 & TEMPMON_TEMPSENSE0_FINISHED_MASK)) { in nxp_tempmon_sample_fetch()
49 data->temp_cnt = (cfg->base->TEMPSENSE0 & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK) >> in nxp_tempmon_sample_fetch()
53 cfg->base->TEMPSENSE0 &= ~TEMPMON_TEMPSENSE0_MEASURE_TEMP_MASK; in nxp_tempmon_sample_fetch()
87 cfg->base->TEMPSENSE0 &= ~TEMPMON_TEMPSENSE0_POWER_DOWN_MASK; in nxp_tempmon_init()
90 cfg->base->TEMPSENSE1 = TEMPMON_TEMPSENSE1_MEASURE_FREQ(0); in nxp_tempmon_init()
109 .base = (TEMPMON_Type *)DT_INST_REG_ADDR(0),
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| /Zephyr-latest/kernel/ |
| D | priority_queues.c | 17 thread_a = CONTAINER_OF(a, struct k_thread, base.qnode_rb); in z_priq_rb_lessthan()
18 thread_b = CONTAINER_OF(b, struct k_thread, base.qnode_rb); in z_priq_rb_lessthan()
27 return thread_a->base.order_key < thread_b->base.order_key in z_priq_rb_lessthan()
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| /Zephyr-latest/drivers/usb/udc/ |
| D | udc_kinetis.c | 79 USB_Type *base; member
175 USB_Type *base = config->base; in usbfsotg_resume_tx() local
177 base->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; in usbfsotg_resume_tx()
185 USB_Type *base = config->base; in usbfsotg_xfer_continue() local
212 buf, bd, base->ENDPOINT[USB_EP_GET_IDX(cfg->addr)].ENDPT, in usbfsotg_xfer_continue()
646 USB_Type *base = config->base; in usbfsotg_isr_handler() local
647 const uint8_t istatus = base->ISTAT; in usbfsotg_isr_handler()
648 const uint8_t status = base->STAT; in usbfsotg_isr_handler()
651 base->ADDR = 0U; in usbfsotg_isr_handler()
660 LOG_DBG("ERROR IRQ 0x%02x", base->ERRSTAT); in usbfsotg_isr_handler()
[all …]
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| /Zephyr-latest/tests/kernel/threads/thread_apis/src/ |
| D | test_kthread_for_each.c | 41 str, thread, thread->base.prio); in thread_callback()
64 str, thread, thread->base.prio); in thread_callback_unlocked()
71 str, thread, thread->base.prio); in thread_callback_unlocked()
229 tid->base.thread_state = 0; in ZTEST()
233 tid->base.thread_state = _THREAD_DUMMY; in ZTEST()
244 tid->base.thread_state = _THREAD_PENDING; in ZTEST()
248 tid->base.thread_state = _THREAD_DEAD; in ZTEST()
252 tid->base.thread_state = _THREAD_SLEEPING; in ZTEST()
256 tid->base.thread_state = _THREAD_SUSPENDED; in ZTEST()
260 tid->base.thread_state = _THREAD_ABORTING; in ZTEST()
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| /Zephyr-latest/lib/posix/options/ |
| D | clock.c | 33 int z_impl___posix_clock_get_base(clockid_t clock_id, struct timespec *base) in z_impl___posix_clock_get_base() argument
37 base->tv_sec = 0; in z_impl___posix_clock_get_base()
38 base->tv_nsec = 0; in z_impl___posix_clock_get_base()
43 *base = rt_clock_base; in z_impl___posix_clock_get_base()
66 struct timespec base; in clock_gettime() local
70 base.tv_sec = 0; in clock_gettime()
71 base.tv_nsec = 0; in clock_gettime()
75 (void)__posix_clock_get_base(clock_id, &base); in clock_gettime()
91 ts->tv_sec += base.tv_sec; in clock_gettime()
92 ts->tv_nsec += base.tv_nsec; in clock_gettime()
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| /Zephyr-latest/drivers/adc/ |
| D | adc_vf610.c | 19 ADC_Type *base; member
74 ADC_Type *base = config->base; in start_read() local
91 ADC_SetResolutionMode(base, resolution); in start_read()
113 ADC_SetAverageNum(config->base, mode); in start_read()
161 ADC_SetIntCmd(config->base, true); in vf610_adc_start_channel()
163 ADC_TriggerSingleConvert(config->base, data->channel_id); in vf610_adc_start_channel()
193 ADC_Type *base = config->base; in vf610_adc_isr() local
196 result = ADC_GetConvertResult(base); in vf610_adc_isr()
214 ADC_Type *base = config->base; in vf610_adc_init() local
222 ADC_Init(base, &adc_config); in vf610_adc_init()
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| /Zephyr-latest/drivers/fpga/ |
| D | fpga_mpfs.c | 46 mm_reg_t base; member
217 while (scb_read(cfg->base, SERVICES_SR_OFFSET) & SCBCTRL_SERVICESSR_BUSY_MASK) { in verify_image()
228 scb_write(cfg->base, SERVICES_CR_OFFSET, value); in verify_image()
235 while (scb_read(cfg->base, SERVICES_CR_OFFSET) & SCBCTRL_SERVICESCR_REQ_MASK) { in verify_image()
242 while (scb_read(cfg->base, SERVICES_SR_OFFSET) & SCBCTRL_SERVICESSR_BUSY_MASK) { in verify_image()
247 status = ((scb_read(cfg->base, SERVICES_SR_OFFSET) & SCBCTRL_SERVICESSR_STATUS_MASK) >> in verify_image()
265 while (scb_read(cfg->base, SERVICES_SR_OFFSET) & SCBCTRL_SERVICESSR_BUSY_MASK) { in activate_image()
274 scb_write(cfg->base, SERVICES_CR_OFFSET, value); in activate_image()
281 while (scb_read(cfg->base, SERVICES_CR_OFFSET) & SCBCTRL_SERVICESCR_REQ_MASK) { in activate_image()
288 while (scb_read(cfg->base, SERVICES_SR_OFFSET) & SCBCTRL_SERVICESSR_BUSY_MASK) { in activate_image()
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| /Zephyr-latest/drivers/serial/ |
| D | uart_mcux.c | 21 UART_Type *base; member
105 retval = UART_Init(config->base, &uart_config, clock_freq); in uart_mcux_configure()
130 uint32_t flags = UART_GetStatusFlags(config->base); in uart_mcux_poll_in()
134 *c = UART_ReadByte(config->base); in uart_mcux_poll_in()
145 while (!(UART_GetStatusFlags(config->base) & kUART_TxDataRegEmptyFlag)) { in uart_mcux_poll_out()
148 UART_WriteByte(config->base, c); in uart_mcux_poll_out()
154 uint32_t flags = UART_GetStatusFlags(config->base); in uart_mcux_err_check()
169 UART_ClearStatusFlags(config->base, kUART_RxOverrunFlag | in uart_mcux_err_check()
185 (UART_GetStatusFlags(config->base) & kUART_TxDataRegEmptyFlag)) { in uart_mcux_fifo_fill()
187 UART_WriteByte(config->base, tx_data[num_tx++]); in uart_mcux_fifo_fill()
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| D | uart_intel_lw.c | 101 mm_reg_t base; member
155 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_in()
158 *p_char = sys_read32(config->base + INTEL_LW_UART_RXDATA_REG_OFFSET); in uart_intel_lw_poll_in()
204 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_out()
210 sys_write32(data->control_val, config->base in uart_intel_lw_poll_out()
213 sys_write32(c, config->base + INTEL_LW_UART_TXDATA_REG_OFFSET); in uart_intel_lw_poll_out()
217 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_out()
223 sys_write32(data->control_val, config->base in uart_intel_lw_poll_out()
249 sys_write32(INTEL_LW_UART_CLEAR_STATUS_VAL, config->base in uart_intel_lw_init()
264 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_init()
[all …]
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| /Zephyr-latest/drivers/dai/nxp/sai/ |
| D | sai.h | 498 I2S_Type *base = UINT_TO_I2S(regmap); in sai_tx_rx_force_disable() local
501 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~I2S_RCSR_RE_MASK)); in sai_tx_rx_force_disable()
503 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~I2S_TCSR_TE_MASK)); in sai_tx_rx_force_disable()
537 I2S_Type *base = UINT_TO_I2S(regmap); in sai_tx_rx_set_dline_mask() local
540 base->RCR3 &= ~I2S_RCR3_RCE_MASK; in sai_tx_rx_set_dline_mask()
541 base->RCR3 |= I2S_RCR3_RCE(mask); in sai_tx_rx_set_dline_mask()
543 base->TCR3 &= ~I2S_TCR3_TCE_MASK; in sai_tx_rx_set_dline_mask()
544 base->TCR3 |= I2S_TCR3_TCE(mask); in sai_tx_rx_set_dline_mask()
550 I2S_Type *base = UINT_TO_I2S(regmap); in sai_dump_register_data() local
552 LOG_DBG("TCSR: 0x%x", base->TCSR); in sai_dump_register_data()
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| /Zephyr-latest/drivers/sensor/nxp/mcux_acmp/ |
| D | mcux_acmp.c | 88 CMP_Type *base; member
146 ACMP_Init(config->base, &data->config); in mcux_acmp_attr_set()
147 ACMP_Enable(config->base, true); in mcux_acmp_attr_set()
159 ACMP_Init(config->base, &data->config); in mcux_acmp_attr_set()
160 ACMP_Enable(config->base, true); in mcux_acmp_attr_set()
171 ACMP_SetDACConfig(config->base, &data->dac); in mcux_acmp_attr_set()
180 ACMP_SetDACConfig(config->base, &data->dac); in mcux_acmp_attr_set()
191 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
201 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
212 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
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| /Zephyr-latest/arch/arc/core/mpu/ |
| D | arc_mpu_v4_internal.h | 56 uint32_t base; member
288 static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size, in _dynamic_region_allocate_and_init() argument
291 int u_region_index = _get_region_index(base, size); in _dynamic_region_allocate_and_init()
294 LOG_DBG("Region info: base 0x%x size 0x%x attr 0x%x", base, size, attr); in _dynamic_region_allocate_and_init()
303 _region_init(region_index, base, size, attr); in _dynamic_region_allocate_and_init()
317 uint32_t end = base + size; in _dynamic_region_allocate_and_init()
320 if ((base == u_region_start) && (end == u_region_end)) { in _dynamic_region_allocate_and_init()
327 _region_init(u_region_index, base, size, attr); in _dynamic_region_allocate_and_init()
329 } else if (base == u_region_start) { in _dynamic_region_allocate_and_init()
334 _region_set_start(u_region_index, base + size); in _dynamic_region_allocate_and_init()
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| /Zephyr-latest/drivers/reset/ |
| D | reset_stm32.c | 19 uintptr_t base; member
27 *status = !!sys_test_bit(config->base + STM32_RESET_SET_OFFSET(id), in reset_stm32_status()
37 sys_set_bit(config->base + STM32_RESET_SET_OFFSET(id), in reset_stm32_line_assert()
48 sys_set_bit(config->base + STM32_RESET_CLR_OFFSET(id), in reset_stm32_line_deassert()
51 sys_clear_bit(config->base + STM32_RESET_SET_OFFSET(id), in reset_stm32_line_deassert()
74 .base = DT_REG_ADDR(DT_INST_PARENT(0)),
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| /Zephyr-latest/arch/common/ |
| D | multilevel_irq_legacy.c | 47 #define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR) argument
49 #define CAT_2ND_LVL_LIST(i, base) \ argument
52 IRQ_INDEX_TO_OFFSET(i, base))
65 #define CAT_3RD_LVL_LIST(i, base) \ argument
68 IRQ_INDEX_TO_OFFSET(i, base))
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| /Zephyr-latest/drivers/dac/ |
| D | dac_mcux_dac32.c | 19 DAC_Type *base; member
56 DAC32_Init(config->base, &dac32_config); in mcux_dac32_channel_setup()
57 DAC32_EnableBufferOutput(config->base, config->buffered); in mcux_dac32_channel_setup()
59 DAC32_EnableTestOutput(config->base, in mcux_dac32_channel_setup()
89 DAC32_EnableBuffer(config->base, false); in mcux_dac32_write_value()
91 DAC32_SetBufferValue(config->base, 0, value); in mcux_dac32_write_value()
92 DAC32_Enable(config->base, true); in mcux_dac32_write_value()
118 .base = (DAC_Type *)DT_INST_REG_ADDR(n), \
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| /Zephyr-latest/tests/kernel/fpu_sharing/float_disable/src/ |
| D | k_float_disable.c | 85 (usr_fp_thread.base.user_options & K_FP_OPTS) != 0, in ZTEST()
87 usr_fp_thread.base.user_options); in ZTEST()
96 (usr_fp_thread.base.user_options & K_FP_OPTS) != 0, in ZTEST()
104 (usr_fp_thread.base.user_options & K_FP_OPTS) == 0, in ZTEST()
106 usr_fp_thread.base.user_options); in ZTEST()
134 (usr_fp_thread.base.user_options & K_FP_OPTS) != 0, in ZTEST()
136 usr_fp_thread.base.user_options); in ZTEST()
145 (usr_fp_thread.base.user_options & K_FP_OPTS) == 0, in ZTEST()
147 usr_fp_thread.base.user_options); in ZTEST()
189 if ((sup_fp_thread.base.user_options & K_FP_REGS) == 0) { in sup_fp_thread_entry()
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