Searched refs:and (Results 501 – 525 of 3855) sorted by relevance
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4250b/doc/ |
| D | index.rst | 6 The EFR32FG1 Flex Gecko 2.4 GHz and 868 MHz Radio Board is delivered as part of
11 Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
23 - Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
25 For more information about the EFR32FG1 SoC and BRD4250B board, refer to these
41 Connections and IOs
45 means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
82 The EFR32FG1P SoC has two USARTs and one Low Energy UARTs (LEUART).
83 USART0 is connected to the board controller and is used for the console.
85 Programming and Debugging
108 Reset the board and you should see the following message in the terminal:
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| /Zephyr-latest/boards/st/nucleo_c071rb/doc/ |
| D | index.rst | 5 The STM32 Nucleo-64 development board with STM32C071RB MCU, supports Arduino and ST morpho connecti…
7 The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
8 and build prototypes with the STM32 microcontroller, choosing from the various
9 combinations of performance, power consumption and features.
11 The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
27 and 24 Kbytes of SRAM.
44 - Two push-button: USER and RESET
60 Connections and IOs
81 Programming and Debugging
86 Applications for the ``nucleo_c071rb`` board can be built and
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| /Zephyr-latest/doc/build/dts/ |
| D | design.rst | 6 Zephyr's use of devicetree has evolved significantly over time, and further
8 specific examples about how they impact Zephyr's source code, and areas where
14 Zephyr's built-in device drivers and sample applications shall obtain
28 - Boot-time pin muxing and pin control for new SoCs shall be accomplished via a
39 particular compatible are enabled. This can and should be done with devicetree
43 generated and maintained by hand. This can and should be obtained from the
65 :file:`dtlib.py` can parse ``dtc`` output, and ``dtc`` can parse
70 devicetree for common elements like interrupts and buses.
73 :file:`edtlib.py`, contains Zephyr-specific knowledge and features.
87 - Devicetree source sharing between Zephyr and Linux is not done.
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| /Zephyr-latest/doc/contribute/ |
| D | external.rst | 11 imported into Zephyr, and the process that governs the inclusion.
18 compiled and linked into the final image, and programmed into the target
33 context and approved by the `Zephyr governing board`_, as described in the
47 By carefully reviewing potential contributions and also enforcing a :ref:`DCO`
59 Committee and evaluated carefully before the external source code is accepted
63 Both the cost of implementing this internally and the one incurred in
74 and careful consideration must be taken to choose the appropriate one for each
87 - The code is subject to the same checks and verification requirements as the
93 This mode of integration can be applicable to both small and large external
101 repository, and then include it under the form of a :ref:`module <modules>`.
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| /Zephyr-latest/drivers/sensor/adi/adltc2990/ |
| D | Kconfig | 1 # ADLTC2990 Quad I2C Voltage, Current and Temperature sensor configuration options
7 bool "ADLTC2990 Quad I2C Voltage, Current and Temperature Monitor"
13 Quad I2C Voltage, Current and Temperature Monitor.
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| /Zephyr-latest/boards/seco/stm32f3_seco_d23/doc/ |
| D | index.rst | 9 supporting OpenGL ES 1.1 / 2.0 / 3.2, Vulkan 1.0, OpenCL 2.0 and Open VG 1.1.
12 to 4GB LPDDR4-3200 32-bit bus memory directly soldered on board and one eMMC
13 5.1 Flash Drive with up to 64GB of capacity. LVDS Single Channel interface and
14 HDMI are supported. The RMII interface and Micrel KSZ8091 Ethernet Transceiver
16 capabilities can be extended by WiFi+BT M.2 module and external modem module.
119 UART3 provides RS-485 interface to connectors CN57 and CN48.
120 In alternative config, USART2 and USART3 are exposed to connector J2.
122 UART1 (in alternate config) and UART5 are connected to CN32.
136 SECO SBC-3.5-PX30 has an onboard CAN transceiver (TJA1051T), and it is
137 connected to both CN29 and CN30. PD0 is connected to EC_CAN_STBY.
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| /Zephyr-latest/boards/st/stm32u5a9j_dk/doc/ |
| D | index.rst | 6 The STM32U5A9J-DK Discovery kit is a complete demonstration and development
11 embedded SRAM, 4 Mbytes of embedded flash memory, and rich graphics features,
13 with state-of-the-art energy efficiency, as well as providing stunning and
15 Chrom-ART Accelerator, and Chrom-GRC™ MMU.
20 interface and capacitive touch panel, USB Type-C® HS, Octo-SPI flash memory
22 Time-of-Flight and gesture detection sensor, temperature sensor, and two 2.54 mm
25 I2C, SDMMC, ADCs, timers, and GPIOs).
28 debugger and programmer for the STM32 microcontroller with a USB Virtual COM
29 port bridge and comes with the STM32CubeU5 MCU Package, which provides an STM32
79 and an LSE oscillator (32.768 kHz crystal) as clock references.
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| /Zephyr-latest/doc/connectivity/networking/api/ |
| D | net_if.rst | 14 and the upper part of the network stack together. All the sent and received
17 and that section is populated at linking time.
25 The network interface can be turned ON by calling ``net_if_up()`` and OFF
31 resolved from its index by calling ``net_if_get_by_index()`` and from interface
44 :kconfig:option:`CONFIG_NET_DEFAULT_IF_FIRST` and
49 The transmitted and received network packets can be classified via a network
53 :kconfig:option:`CONFIG_NET_TC_TX_COUNT` and :kconfig:option:`CONFIG_NET_TC_RX_COUNT` options.
55 If the :kconfig:option:`CONFIG_NET_PROMISCUOUS_MODE` is enabled and if the underlying
65 Zephyr distinguishes between two interface states: administrative state and
68 :c:enumerator:`NET_IF_UP` flag and is controlled by the application. It can be
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| D | net_l2.rst | 14 and the related device drivers from the upper network stack. This is made
19 object and the generic API provided by the L2 layer in
24 specific for that device, and optimized for working together.
28 :ref:`OpenThread <thread_protocol_interface>`, Wi-Fi, and a dummy layer example
35 one needs to understand how the L3 layer interacts with it and
53 will be generated and added by this function.
58 interface. The function returns ``<0`` if error and ``>=0`` if no error.
76 macros will call the :c:macro:`DEVICE_DEFINE()` macro, and also
85 and is not detailed here.
92 :c:struct:`net_pkt` and should be allocated through
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| /Zephyr-latest/boards/nxp/frdm_ke17z/doc/ |
| D | index.rst | 10 communication, flash programming, and run-control debugging.
16 and 100 Low profile Quad Flat Package (LQFP))
26 For more information about the KE1xZ SoC and the FRDM-KE17Z board, see
85 Programming and Debugging
88 Build and flash applications as usual (see :ref:`build_an_application` and
94 A debug probe is used for both flashing and debugging the board. This board is
98 and require an update. Please see the `DAPLink Bootloader Update`_ page for
104 Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
108 Linkserver is the default for this board, ``west flash`` and ``west debug`` will
119 Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
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| /Zephyr-latest/boards/st/disco_l475_iot1/doc/ |
| D | index.rst | 9 low-power communication, multiway sensing and ARM |reg| Cortex |reg|-M4 core-based
20 - Capacitive digital sensor for relative humidity and temperature (HTS221)
22 - 3D accelerometer and 3D gyroscope (LSM6DSL)
24 - Time-of-Flight and gesture-detection sensor (VL53L0X)
25 - 2 push-buttons (user and reset)
33 - mass storage, virtual COM port and debug port
43 - Ultra-low-power with FlexPowerControl (down to 120 nA Standby mode and 100 uA/MHz run mode)
53 - RTC with HW calendar, alarms and calibration
54 - Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
57 - 2x 32-bit and 5x 16-bit general purpose
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| /Zephyr-latest/boards/seeed/lora_e5_dev_board/doc/ |
| D | lora_e5_dev_board.rst | 11 various data protocols and interfaces including RS-485 and Grove.
17 and a 32.768kHz crystal oscillator in a 28-pin SMD package.
18 This STM32WLEJC SOC is powered by ARM Cortex-M4 core and integrates Semtech
19 SX126X LoRa IP to support (G)FSK, BPSK, (G)MSK, and LoRa modulations.
27 (G)FSK, (G)MSK, and BPSK modulations
28 - 256-Kbyte Flash memory and 64-Kbyte SRAM
29 - Hardware encryption AES256-bit and a True random number generator
32 - 1 user, 1 boot, and 1 reset push-button
41 - 3 Grove connectors(2x IIC and 1x UART)
43 - SMA-K and IPEX antenna connectors
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| /Zephyr-latest/boards/adafruit/feather_esp32s3/doc/ |
| D | index.rst | 9 LiPo battery charger, a fuel gauge, a USB-C and Qwiic/STEMMA-QT connector. For
17 - 512KB SRAM and either 8MB flash or 4MB flash + 2MB PSRAM, depending on the
19 - USB-C directly connected to the ESP32-S3 for USB/UART and JTAG debugging
20 - LiPo connector and built-in battery charging when powered via USB-C
21 - MAX17048 fuel gauge for battery voltage and state-of-charge reporting
22 - Charging indicator LED, user LED, reset and boot buttons
31 execute customized tasks in stand-alone mode and/or exchanging data over OpenAMP
80 Connections and IOs
84 board including `pinouts`_ and the `schematic`_.
86 Programming and Debugging
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| /Zephyr-latest/soc/espressif/esp32c2/ |
| D | Kconfig | 24 bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
27 If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
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| /Zephyr-latest/drivers/watchdog/ |
| D | Kconfig.smartbond | 3 # Copyright (c) 2022 Renesas Electronics Corporation and/or its affiliates
21 Watchdog timer generates NMI at value 0, and WDOG (SYS)
26 reset at value 0 and can not be frozen by Software.
27 Note that this bit can only be set to 1 by SW and
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| /Zephyr-latest/boards/nxp/mimxrt595_evk/ |
| D | mimxrt595_evk_mimxrt595s_f1.dts | 32 /* Reset section must always be at 0 and at least 1kB. */
36 /* Code and data sections can be moved around and resized if needed. */
40 /* On RT595 ADSP shared RAM is mapped at offset 0 on the code bus and at
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| /Zephyr-latest/samples/drivers/lora/send/ |
| D | README.rst | 11 the encoding settings and send data over the radio.
13 Transmitted messages can be received by building and flashing the accompanying
17 Building and Running
20 Build and flash the sample as follows, changing ``b_l072z_lrwan1`` for
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| /Zephyr-latest/samples/subsys/usb/midi/ |
| D | README.rst | 5 Implements a simple USB MIDI loopback and keyboard device.
12 sent to the device back to the host. In addition, presses and release on
13 input keys (such as the board user buttons) are sent as MIDI1 note on and
20 the output and the input, and the input keys act as a MIDI keyboard.
22 Building and Running
27 To build and flash the application:
58 Open a first shell, and start dumping MIDI events:
73 On devboards with a user button, press it and observe that there are some note
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| /Zephyr-latest/boards/seagate/faze/doc/ |
| D | index.rst | 7 SSD and two chips are embedded: an ASMedia ASM2364 USB-to-PCIe bridge controller
8 and a NXP LPC11U67 MCU. The former is handling the USB type-C to SSD I/Os while
10 through I2C and GPIOs.
42 Connections and IOs
69 Programming and Debugging
80 Once the debug probe is connected to both the FaZe board and your host computer
87 Please refer to the `Flashing`_ section and run the ``west debug`` command
98 …and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1100-cortex-m0-plus-m0/scalable-…
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| /Zephyr-latest/boards/waveshare/rp2040_zero/doc/ |
| D | index.rst | 12 - 264KB of SRAM, and 2MB of on-board Flash memory.
15 - USB 1.1 with device and host support.
16 - Low-power sleep and dormant modes.
17 - Drag-and-drop programming using mass storage over USB.
20 - Accurate clock and timer on-chip.
51 Programming and Debugging
68 …already connected via USB you can keep the ``RESET`` button pressed, press and release ``BOOT``, r…
74 … can locate the generated file at ``build/zephyr/zephyr.uf2 file`` and simply drag-and-drop to the…
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| /Zephyr-latest/samples/net/tftp_client/ |
| D | README.rst | 11 based on UDP, and is designed to get a file from or put a file onto a remote host.
14 and establishes a connection to a TFTP server on standard port 69.
25 Building and Running
43 The easiest way to setup this sample application is to build and run it
45 … described in :ref:`networking_with_eth_qemu`, :ref:`networking_with_qemu` and :ref:`networking_wi…
56 Download and run a TFTP server (like TFTPd), then create file1.bin (with data) and newfile.bin.
58 Please note that default IP server address is 192.0.2.2 and default port is 69.
59 To specify an IP server address and/or port, change these configurations in ``prj.conf``:
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| /Zephyr-latest/samples/drivers/ipm/ipm_imx/ |
| D | README.rst | 11 using the IPM and transmits it back unchanged. The information about
15 The i.MX Messaging Unit peripheral consists of four 32-bit transmit and receive
23 and blocking sending of the data back is done in the interrupt handler, which
26 Building and Running the Zephyr Code
43 for how to load the Zephyr binary to the desired core and execute it.
45 Building and Running the Linux Code
50 and write data into the Messaging Unit.
52 The remote code and the instructions how to build and run it are located at:
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| /Zephyr-latest/samples/subsys/shell/shell_module/ |
| D | README.rst | 10 This is a simple application demonstrating how to write and register commands
17 ``login`` and ``logout`` are conditionally registered commands depending
21 See ``dynamic`` command and :zephyr_file:`samples/subsys/shell/shell_module/src/dynamic_cmd.c`
31 ``login`` and ``logout`` implement the login and logout mechanism, respectively.
34 ``login`` and ``logout`` implement the feature of enabling and disabling
43 Building and Running
64 After running the application, the console displays the shell interface, and
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| /Zephyr-latest/boards/nxp/s32z2xxdc2/doc/ |
| D | index.rst | 18 Information about the hardware and design resources can be found at
74 Connections and IOs
77 The SoC's pads are grouped into ports and pins for consistency with GPIO driver
78 and the HAL drivers used by this Zephyr port. The following table summarizes
79 the mapping between pads and ports/pins. This must be taken into account when
142 NETC driver supports to manage the Physical Station Interface (PSI0) and/or a
153 CANEXCEL supports CAN Classic (CAN 2.0) and CAN FD modes. Remote transmission
158 transceiver. Any transceiver pin-compatible with CAN 2.0 and CAN FD protocols
164 FlexCAN supports CAN Classic (CAN 2.0) and CAN FD modes.
170 12-bit resolution. ADC channels are divided into 2 groups (precision and internal/standard).
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| /Zephyr-latest/boards/st/nucleo_wba52cg/doc/ |
| D | nucleo_wba52cg.rst | 6 NUCLEO-WBA52CG is a Bluetooth® Low Energy wireless and ultra-low-power board
7 embedding a powerful and ultra-low-power radio compliant with the Bluetooth®
10 The ARDUINO® Uno V3 connectivity support and the ST morpho headers allow the
15 Cortex®‑M33 core, featuring 1 Mbyte of flash memory and 128 Kbytes of SRAM in
21 - Arm® Cortex® M33 CPU with TrustZone®, MPU, DSP, and FPU
25 - Three user and one reset push-buttons
35 mass storage, Virtual COM port, and debug port
42 The STM32WBA52xx multiprotocol wireless and ultralow power devices embed a
43 powerful and ultralow power radio compliant with the Bluetooth® SIG Low Energy
58 ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
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