Searched refs:and (Results 476 – 500 of 3855) sorted by relevance
1...<<11121314151617181920>>...155
/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/doc/ |
D | index.rst | 6 The PSOC 6 AI Evaluation Kit (CY8CKIT-062S2-AI) is a cost effective and small development kit that 7 enables design and debug of PSOC 6 MCUs. 8 It includes a CY8C624ABZI-S2D44 MCU which is based on a 150-MHz Arm |reg| Cortex |reg|-M4 and 10 a Quad-SPI external memory interface, built-in hardware and software security features, 11 rich analog, digital, and communication peripherals. 14 a 512 MB NOR flash, an onboard programmer/debugger (KitProg3), USB host and device features, 15 two user LEDs, and one push button. 20 For more information about the CY8C624ABZI-S2D44 MCU SoC and CY8CKIT-062S2-AI board: 63 Programming and Debugging 67 to provide debugging, flash programming, and serial communication over USB. [all …]
|
/Zephyr-latest/boards/blues/swan_r5/doc/ |
D | index.rst | 7 accelerate the development and deployment of battery-powered solutions. 10 and remote monitoring. 15 Adafruit's myriad sensors and FeatherWing-compatible carriers. 21 power---and provides a software-switchable 2 Amp regulator for powering external 27 with a wide range of connectivity support and configurations. Here are 31 - 2MB of flash and 640KB of RAM 40 - Two push-buttons: USER and RESET 51 - low-power RTC, and CRC calculation peripherals 61 and 100 uA/MHz run mode) 65 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions [all …]
|
/Zephyr-latest/boards/nxp/frdm_rw612/doc/ |
D | index.rst | 7 integrated 260 MHz ARM Cortex-M33 MCU and Wi-Fi 6 + Bluetooth Low Energy (LE) 5.3 / 802.15.4 9 gaming controllers, enterprise and industrial automation, smart accessories and smart energy. 11 The RW612 MCU subsystem includes 1.2 MB of on-chip SRAM and a high-bandwidth Quad SPI interface 14 The advanced design of the RW612 delivers tight integration, low power and highly secure 15 operation in a space- and cost-efficient wireless MCU requiring only a single 3.3 V power supply. 60 | | | Modes 1 and 2 | 79 Programming and Debugging 82 Build and flash applications as usual (see :ref:`build_an_application` and 88 A debug probe is used for both flashing and debugging the board. This board is 94 Connect a USB cable from your PC to J10, and use the serial terminal of your choice [all …]
|
/Zephyr-latest/boards/nxp/rddrone_fmuk66/doc/ |
D | index.rst | 7 connectors and a Kinetis K66 on board. 9 - Comes with a J-Link Edu Mini for programming and UART console. 15 crystal-less USB, and 144 Low profile Quad Flat Package (LQFP)) 18 - FXOS8700CQ accelerometer and magnetometer 27 For more information about the K64F SoC and FRDM-K64F board: 102 device and host functions through its micro USB connector (K66F USB). 105 Programming and Debugging 108 Build and flash applications as usual (see :ref:`build_an_application` and 114 A debug probe is used for both flashing and debugging the board. This board is 116 with accessories comes with a jlink mini edu and cable specifically for this board [all …]
|
/Zephyr-latest/samples/net/cloud/aws_iot_mqtt/ |
D | README.rst | 5 Connect to AWS IoT Core and publish messages using MQTT. 19 - Sending and receiving keep-alive pings 27 - AWS credentials and necessary information 30 Building and Running 33 This application has been built and tested on the ST NUCLEO-F429ZI board and 34 QEMU x86 target. A valid certificate and private key are required to 36 the certificate and private key in order to embed them in the application. 38 Register a *thing* in AWS IoT Core and download the certificate and private key. 41 script, which will generate files ``ca.c``, ``cert.c`` and ``key.c``. 44 Core region, thing, and device advisor configuration: [all …]
|
/Zephyr-latest/doc/security/ |
D | secure-coding.rst | 9 from the world, and not very vulnerable, just because of the 16 This document describes the requirements and process for ensuring 22 Introduction and Scope 38 documents, and full details of how to write secure software are beyond 58 help prevent security violations and limit their impact: 63 security measures, publicly accepted cryptographic algorithms and 67 system shall be kept as simple and small as possible. In the context 69 [PAUL09]_ and abstracted APIs. 71 - **Complete mediation** requires that each access to every object and 76 and permitted only in specific conditions defined by the system [all …]
|
/Zephyr-latest/cmake/modules/ |
D | arch.cmake | 6 # Configure ARCH settings based on KConfig settings and arch root. 9 # on board directory and arch root. 23 # Variables set by this module and not mentioned above are considered internal 24 # use only and may be removed, renamed, or re-purposed without prior notice. 31 # (read: multi-core and multi-arch SoC). 37 "an appropriate SoC in Kconfig, SoC=${CONFIG_SOC}, and that the SoC "
|
/Zephyr-latest/.github/ISSUE_TEMPLATE/ |
D | 003_rfc-proposal.md | 13 This section targets end users, TSC members, maintainers and anyone else that might 19 Why do we want this change and what problem are we trying to address? 42 you're planning to change and how. 51 ### Concerns and Unresolved Questions 53 List any concerns, unknowns, and generally unresolved questions etc. 58 List any alternatives considered, and the reasons for choosing this option
|
/Zephyr-latest/samples/boards/st/power_mgmt/standby_shutdown/ |
D | README.rst | 5 Enter and exit Standby/Shutdown mode on STM32. 10 This sample is a minimum application to demonstrate basic power management of Standby mode and 13 Press and hold the user button: 28 Building and Running 31 Build and flash standby_shutdown as follows, changing ``nucleo_L476RG`` for your board: 40 Press and hold the user button:
|
/Zephyr-latest/samples/drivers/espi/ |
D | README.rst | 5 Use eSPI to connect to a slave device and exchange virtual wire packets. 12 It shows how to configure and select eSPI controller capabilities as part of 17 eSPI events and when a virtual wire is received. 19 Building and Running 22 The sample can be built and executed on boards supporting eSPI. 24 Sample requires a correct harness and fixture setup.
|
/Zephyr-latest/samples/drivers/can/counter/ |
D | README.rst | 5 Send and receive CAN messages. 11 Messages with standard and extended identifiers are sent over the bus. 12 Messages are received using message-queues and work-queues. 13 Reception is indicated by blinking the LED (if present) and output of 16 Building and Running 24 The sample can be built and executed for boards with a SoC that have an
|
/Zephyr-latest/samples/bluetooth/hci_spi/ |
D | README.rst | 16 A board with SPI slave, GPIO and Bluetooth Low Energy support. 18 Building and Running 24 the host and associates the application with a SPI bus to use. 30 You can then build this application and flash it onto your board in 31 the usual way; see :ref:`boards` for board-specific building and 39 Refer to :zephyr:code-sample-category:`bluetooth` for general Bluetooth information, and
|
/Zephyr-latest/boards/native/native_sim/doc/ |
D | index.rst | 16 the Zephyr kernel, and libraries, creating a normal Linux executable. 20 and the :ref:`POSIX architecture<Posix arch>`. 24 developing and testing application code which would require them. 30 | Some components, code, options names, and documentation will still use the old native_posix 41 Important limitations and unsupported features 44 ``native_sim`` is based on the :ref:`POSIX architecture<Posix arch>`, and therefore 45 :ref:`its limitations <posix_arch_limitations>` and considerations apply to it. 107 Since the Zephyr executable is a native application, it can be debugged and 114 code multiple times and get the exact same result. Instrumenting the 156 32 and 64bit versions [all …]
|
/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/ |
D | brg_cfg.rst | 21 The Bridge Configuration Client model is optional and allows nodes to configure the Subnet Bridge on 23 These models define the necessary states, messages, and behaviors for configuring and managing the 26 The configuration and management of the Subnet Bridge feature are handled using the Bridge 27 Configuration Server and Client models. 34 To get a better understanding of the Subnet Bridge feature and its capabilities, an overview of a 48 A Subnet Bridge node is a node in a Bluetooth Mesh network that belongs to multiple subnets and has 50 Subnet Bridge node connects the subnets, and allows communication between them by relaying 54 IV Update procedure and propagates updates to other subnets. 60 The Bridging Table contains the entries for the subnets that are bridged by the node, and is managed 107 Subnet bridging and replay protection [all …]
|
/Zephyr-latest/boards/adi/apard32690/doc/ |
D | index.rst | 5 The AD-APARD32690-SL is a platform for prototyping intelligent, secure, and connected field devices. 6 It has an Arduino Mega-compatible form factor and two Pmod-compatible connectors. 7 The system includes the MAX32690 ARM Cortex-M4 with FPU-Based Microcontroller and Bluetooth LE 5.2. 8 The MCU is coupled with external RAM (2 x 512 Mb) and Flash (64 Mb) memories to meet the requiremen… 10 security features such as for root-of-trust, mutual authentication, data confidentiality and 11 integrity, secure boot, and secure communications. 13 data acquisition and system configuration. The 10BASE-T1L interface also supports Single-pair 14 Power over Ethernet (SPoE) and be used for powering the system via an Arduino shield implementing 27 - 7.3728MHz and 60MHz Low-Power Oscillators 33 - 1.8V and 3.3V I/O with No Level Translators [all …]
|
/Zephyr-latest/boards/andestech/adp_xc7k_ae350/doc/ |
D | index.rst | 9 ADP-XC7K series are FPGA-based development and prototyping boards for evaluation of 10 variety of AndesCore processors and AndeShape SoC platform IPs. 14 1st figure shows the green PCB is ADP-XC7K160 and 2nd figure shows the red PCB is ADP-XC7K410. 24 More information can be found on `ADP-XC7K160/410`_ and `AndeShape AE350`_ websites. 30 1GB RAM, Cache, SPI flash memory, ethernet controller and other peripherals. 47 - MIC-in, Line-in, and Line-out with AC97 audio codec 54 Connections and IOs 167 The Zephyr console output is by default assigned to UART2 and the default 170 Programming and debugging 174 connect Andes ICE from host computer to ADP-XC7K board and execute the [all …]
|
/Zephyr-latest/boards/nxp/mimxrt1180_evk/doc/ |
D | index.rst | 6 The dual core i.MX RT1180 runs on the Cortex-M33 core at 240 MHz and on the 8 temperature range and is qualified for consumer, industrial and automotive 17 - 1.5MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4 38 - Left and right speaker out connectors 55 For more information about the MIMXRT1180 SoC and MIMXRT1180-EVK board, see 142 Connections and I/Os 185 configured for the CM7 console core and the remaining are not used. 220 Programming and Debugging 223 Build and flash applications as usual (see :ref:`build_an_application` and 230 A debug probe is used for both flashing and debugging the board. This board is [all …]
|
/Zephyr-latest/samples/subsys/mgmt/hawkbit/ |
D | README.rst | 12 and a polling mechanism. 14 This sample shows how to use hawkBit DDI API in both a polling and manual 18 for updates and installing them without requiring user intervention. You can 21 Manual mode requires the user to call the server probe and then, if there is 30 build and run for other platforms with support internet connection. Some 37 More information about the Device Firmware Upgrade subsystem and MCUboot 40 Building and Running 43 The below steps describe how to build and run the hawkBit sample in 75 the server URL, ``<your-ip-address>:8080``, and logging into the server using 76 ``admin`` as the login and password by default. [all …]
|
/Zephyr-latest/samples/subsys/usb/hid-keyboard/ |
D | README.rst | 16 This project requires an experimental USB device driver (UDC API) and uses the 19 At least one key is required and up to four can be used. The first three keys 20 are used for Num Lock, Caps Lock and Scroll Lock. The fourth key is used to 21 report HID keys 1, 2, 3 and the right Alt modifier at once. 26 Building and Running
|
/Zephyr-latest/samples/modules/mctp/mctp_endpoint/ |
D | README.rst | 14 A board and SoC that provide access to a UART and a driver that implements the 21 and this board's UART rx pin connects to the host board's tx pin. The boards' 24 Optionally a logic analyzer can be wired up and listening to the UART to inspect 27 Building and Running
|
/Zephyr-latest/tests/boards/espressif/cache_coex/ |
D | README.rst | 9 This code tests SPI Flash and PSRAM content integrity after multithreaded and concurrent accesses to 10 a common cache. It does so by allocating a big PSRAM memory chunk and repeatedly filling that region 12 value. By the end of the thread iterations, both PSRAM and SPI Flash have its contents compared aga… 21 Building and Running
|
/Zephyr-latest/samples/drivers/ht16k33/ |
D | README.rst | 5 Control up to 128 LEDs connected to an HT16K33 LED driver and log keyscan events. 17 2. blink the LEDs at 2 Hz, 1 Hz, and 0.5 Hz 19 4. turn off all LEDs, restore 100% brightness, and start over 23 Building and Running 26 Build the application for the :ref:`nrf52840dk_nrf52840` board, and
|
/Zephyr-latest/samples/subsys/task_wdt/ |
D | README.rst | 12 Building and Running 15 It should be possible to build and run the task watchdog sample on almost any 19 Building and Running for ST Nucleo L073RZ 21 The sample can be built and executed for the 35 The following output is printed and continuously repeated (after each
|
/Zephyr-latest/samples/boards/bbc/microbit/pong/ |
D | README.rst | 13 micro:bit (labeled A and B). Initially the playing mode is selected: use 14 button A to toggle between single- and multi-player, and press button B 19 and connect to a second micro:bit which has also been set into multi-player 25 Building and running
|
/Zephyr-latest/doc/kernel/ |
D | timeutil.rst | 18 Time. These systems interpret time in different ways and may have 19 discontinuities due to `leap seconds <https://what-if.xkcd.com/26/>`__ and 24 the Zephyr clock and the actual time in a "real" civil time scale is not 25 constant and can vary widely over the runtime of a Zephyr application. 30 * :ref:`synchronizing and aligning time scales <timeutil_sync>` 32 For terminology and concepts that support these functions see 46 ``time_t`` and ``struct timespec``, which are generally interpreted as a 50 * Calendar time as a year, month, day, hour, minutes, and seconds relative to 62 the calendar time representation and deal with sub-second offsets separately. 66 :c:func:`timeutil_timegm` and :c:func:`timeutil_timegm64`. [all …]
|
1...<<11121314151617181920>>...155