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| /Zephyr-latest/boards/nxp/twr_kv58f220m/doc/ |
| D | index.rst | 7 MCU-based platforms. The onboard OpenSDAv2 serial and debug adapter,
9 communication, flash programming, and run-control debugging.
15 and 144 Low profile Quad Flat Package (LQFP))
17 - 6-axis FXOS8700CQ digital accelerometer and magnetometer
24 For more information about the KV5x SoC and the TWR-KV58F220M board, see
83 Accelerometer and magnetometer
87 accelerometer and magnetometer for sensor values
91 the jumpers ``J2`` and ``J9``. A trigger option also must be enabled in Kconfig
95 Programming and Debugging
98 Build and flash applications as usual (see :ref:`build_an_application` and
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| /Zephyr-latest/boards/arduino/due/doc/ |
| D | index.rst | 8 SAM3X8E ARM Cortex-M3 CPU and the following devices:
17 The `Atmel SAM3X8E Datasheet`_ has the information and the datasheet about
31 See `Arduino Due website`_ and `Atmel SAM3X8E Datasheet`_ for a complete
35 For I2C, pull-up resistors are required for using SCL1 and SDA1 (near IO13).
40 There are 15 fixed exceptions including exceptions 12 (debug monitor) and 15
42 be a variable number of IRQs. Exceptions 7-10 and 13 are reserved. They don't
48 Handlers are provided for exceptions 1-6, 11-12, and 14-15. The table here
72 | | | | and IRQ offloading |
84 at priority 0 for the interrupt locking mechanism and exception handling
91 32.768 kHz, and the main clock is 12 MHz. The processor can set up PLL to drive
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| /Zephyr-latest/arch/xtensa/core/ |
| D | README_WINDOWS.rst | 3 There is a paucity of introductory material on this subject, and
11 Registers are grouped and rotated in units of 4, so there are 8 or 16
17 and WINDOWBASE is 15, quads 15, 0, 1, and 2 will be visible as
18 (respectively) A0-A3, A4-A7, A8-A11, and A12-A15.
30 (yes, two; see below): the 2-bit CALLINC field of the PS register, and
39 top two bits from the return address in A0 and subtracts that value
42 many calls, so they need to be GPR data that lives in registers and
44 return value format and is used immediately, so it makes more sense
48 wrapped around and needs to be spilled or filled. To do this there is
53 will be set by the ENTRY instruction, and remain set after rotations
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| /Zephyr-latest/boards/nxp/twr_ke18f/doc/ |
| D | index.rst | 7 MCU-based platforms. The onboard OpenSDAv2 serial and debug adapter,
9 communication, flash programming, and run-control debugging.
15 and 100 Low profile Quad Flat Package (LQFP))
17 - 6-axis FXOS8700CQ digital accelerometer and magnetometer
27 For more information about the KE1xF SoC and the TWR-KE18F board, see
99 Accelerometer and magnetometer
103 accelerometer and magnetometer for sensor values
107 ``R47`` and ``R57`` must be mounted on the TWR-KE18F board. The
124 Programming and Debugging
127 Build and flash applications as usual (see :ref:`build_an_application` and
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| /Zephyr-latest/boards/ezurio/bl654_sensor_board/doc/ |
| D | bl654_sensor_board.rst | 20 * RADIO (Bluetooth Low Energy and 802.15.4)
29 :alt: BL654 Sensor Board connected to USB-SWD Programmer (UART and SWD access)
31 BL654 Sensor Board connected to USB-SWD Programmer (UART and SWD access)
45 Connections and IOs
83 Programming and Debugging
87 flashed, and debugged in the usual way. See :ref:`build_an_application` and
88 :ref:`application_run` for more details on building and running. An external
91 programmer can be used to program and debug the BL654 sensor board.
97 page to install and configure all the necessary software. Further information
98 can be found in :ref:`nordic_segger_flashing`. Then build and flash applications
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| /Zephyr-latest/boards/adi/max78000fthr/doc/ |
| D | index.rst | 7 accelerator. The board also includes the MAX20303 PMIC for battery and power management. The form f…
10 SRAM, micro SD card connector, RGB indicator LED, and pushbutton. The MAX78000FTHR provides a power…
11 platform for quick proof-of-concepts and early software development to enhance time to market.
27 - 512KB Flash and 128KB SRAM
42 - 1 and 2 Dimensional Convolution Processing
44 - Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
54 - Security and Integrity
72 | CLOCK | on-chip | clock and reset control |
101 Connections and IOs
130 | 11 | P0_7 | GPIO or QSPI0 clock signal. Shared with SD card and on-board QSPI SRAM …
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| /Zephyr-latest/boards/nordic/thingy52/doc/ |
| D | index.rst | 16 processor, a set of environmental sensors, a pushbutton, and two RGB LEDs.
24 * Humidity and temperature sensor
44 `Nordic Thingy:52 guide`_ contains the processor's information and the
54 * CO2 and TVOC sensor
55 * Humidity and temperature sensor
58 * Provisions for a pin header and I2C and serial connectors
81 | and Temp | | |
90 | and Temp | | |
105 Connections and IOs
140 The pins can be found on the P4 and P6 connectors. The system UART console
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| /Zephyr-latest/boards/nxp/mimxrt685_evk/doc/ |
| D | index.rst | 7 playback and voice user interface applications combining a high-performance
13 The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several
23 - UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe
29 - Reset and User buttons
30 - Arduino and PMod/Host expansion connectors
32 - Stereo audio codec with line in/out and electret microphone
37 For more information about the MIMXRT685 SoC and MIMXRT685-EVK board, see
55 board is the :zephyr:board:`mimxrt595_evk`, and that board may have additional features
110 Connections and IOs
206 configured as USART for the console and the remaining are not used.
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| /Zephyr-latest/doc/contribute/ |
| D | contributor_expectations.rst | 10 - Reviewed more quickly and reviewed more thoroughly. It's easier for reviewers
17 - Easier to rebase and merge. Smaller PRs are less likely to conflict with other
24 commits and any combination of smaller PRs for testing and preview purposes.
25 Draft PRs have no review expectation and PRs created as drafts from the start
45 and pass with the fix applied.
50 This provides context to the reviewer and prevents submitting PRs with unused
58 in mind each commit in the PR must still build cleanly and pass all the CI
75 describing the full scope of change and future work. The RFC proposal provides
77 get reviewed and merged into the project. The RFC should also define the minimum
101 - The PR description must include a summary of the changes and their rationales.
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| /Zephyr-latest/doc/services/logging/ |
| D | cs_stm.rst | 6 The Arm CoreSight SoC-400 is a comprehensive library of components for the creation of debug and
10 the STMESP (STM Extended Stimulus Port) peripheral registers. Multiple cores can share and directly
18 …t has registers for writing data (with or without timestamp and with or without marking) and writi…
20 Hardware manages multiplexing of data from different STMESP register sets and from different cores
21 by adding Major and Channel opcodes into the stream when necessary. Timestamp (from common source f…
25 Trace Router). TPIU is a 5 pin interface (4 data pins and clock) and external tool is required to
49 …gister sets and use multiple sets to avoid locking context. The atomically incremented channel cou…
59 content is written to STMESP. Early logging is applicable only to the core which owns and configures
69 0 and 65280.
70 * :c:func:`log_frontend_stmesp_tp_d32` - It accepts two arguments - index and user data.
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| /Zephyr-latest/doc/hardware/porting/ |
| D | board_porting.rst | 8 support for at least one SoC and all of its features. Therefore, Zephyr must
17 Zephyr. This new model overhauls the way both SoCs and boards are named and
18 defined, and adds support for features that had been identified as important
23 - Support for reusing the SoC and board Kconfig trees outside of the Zephyr
26 - Removal of all existing arbitrary and inconsistent uses of Kconfig and folder
33 More information about the rationale, development and concepts behind the new
35 :github:`original Pull Request <50305>` and, for a complete set of changes
38 Some non-critical features, enhancements and improvements of the new hardware
44 and SoC definitions. A decision was made not to provide direct backwards
46 previous version of Zephyr to one including the new model (v3.7.0 and onwards)
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| /Zephyr-latest/doc/connectivity/networking/ |
| D | overview.rst | 13 The networking IP stack is modular and highly configurable via build-time
21 * Developer can set the number of unicast and multicast IPv6 addresses that
26 * The system also supports multiple IPv6 prefixes and the maximum
28 * The IPv6 neighbor cache can be disabled if not needed, and its size can be
48 the system to use both IPv6 and IPv4 at the same time.
58 and client roles can be used the application. The amount of TCP sockets
63 implemented. Both blocking and non-blocking datagram (UDP) and stream (TCP)
66 * **Secure Sockets API** Experimental support for TLS/DTLS secure protocols and
76 Both :zephyr:code-sample:`coap-client` and :zephyr:code-sample:`coap-server` sample
81 Registration", "Device Management & Service Enablement" and "Information
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| /Zephyr-latest/boards/st/nucleo_h745zi_q/doc/ |
| D | index.rst | 6 The STM32 Nucleo-144 board provides an affordable and flexible way for users
7 to try out new concepts and build prototypes by choosing from the various combinations
8 of performance and power consumption features, provided by the STM32 microcontroller.
12 The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and
19 libraries and examples available with the STM32Cube MCU Package.
27 - 2 user and reset push-buttons
39 - capability: mass storage, virtual COM port and debug port
41 - Comprehensive free software libraries and examples available with the
69 - USB OTG Full Speed and High Speed(1)
95 and a ST morpho connector. Board is configured as follows:
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| /Zephyr-latest/samples/subsys/mgmt/mcumgr/smp_svr/ |
| D | README.rst | 13 For more information about MCUmgr and SMP, please see :ref:`device_mgmt`.
33 properly. More information about the Device Firmware Upgrade subsystem and
54 Bluetooth Low Energy (BLE) and do not have a built-in or pluggable BLE radio,
55 you can build one and use it following the instructions in
63 The below steps describe how to build and run the ``smp_svr`` sample in Zephyr with ``MCUboot``
83 To build the serial sample with file-system and shell management support:
122 The UDP transport for SMP supports both IPv4 and IPv6.
123 In the sample, both IPv4 and IPv6 are enabled, but they can be
124 enabled and disabled separately.
141 partitioning. Flash both MCUboot and the sample application:
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| /Zephyr-latest/doc/services/mem_mgmt/ |
| D | index.rst | 7 using the ``zephyr,memory-attr`` property. This property and the related memory
12 and explained in :zephyr_file:`include/zephyr/dt-bindings/memory-attr/memory-attr.h`.
31 by the architecture) in a new linker section and region.
34 architecture-specific and software-specific custom attributes that can be
47 See :zephyr_file:`include/zephyr/dt-bindings/memory-attr/memory-attr-arm.h` and
52 The conventional and recommended way to deal and manage with memory regions
55 list of memory regions and their attributes are compiled in a user-accessible
56 array and a set of functions is made available that can be used to query, probe
57 and act on regions and attributes (see next section for more details).
67 however, that for some architectures (such as ARM and ARM64) the MPU driver
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| /Zephyr-latest/boards/nxp/frdm_ke17z512/doc/ |
| D | index.rst | 7 MCU-based platforms. The onboard OpenSDAv2 serial and debug adapter,
9 communication, flash programming, and run-control debugging.
15 and 100 Low profile Quad Flat Package (LQFP))
17 - 6-axis FXOS8700CQ digital accelerometer and magnetometer
25 For more information about the KE1xZ SoC and the FRDM-KE17Z512 board, see
87 Programming and Debugging
90 Build and flash applications as usual (see :ref:`build_an_application` and
96 A debug probe is used for both flashing and debugging the board. This board is
100 and require an update. Please see the `DAPLink Bootloader Update`_ page for
106 Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
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| /Zephyr-latest/boards/digilent/zybo/doc/ |
| D | index.rst | 9 The `Digilent Zybo`_ (ZYnq BOard) is a feature-rich, ready-to-use embedded software and digital
48 Programming and Debugging
55 The instructions here use the U-Boot SPL. For further details and instructions for using Das U-Boot
64 Clone and build Das U-Boot for the Digilent Zybo:
83 the ``PS-SRST`` button), and initialize the Zynq-7000 series SoC by uploading and running the U-Boot
86 Next, upload and run the Zephyr application:
100 Another option is to load and run the :zephyr:code-sample:`hello_world` application via U-Boot. Copy
101 ``u-boot/spl/boot.bin``, ``u-boot/u-boot.img``, and ``zephyr/zephyr.bin`` to a FAT32 formatted
103 configured for ``SD`` boot, and turn on the board.
122 the ``PS-SRST`` button), and initialize the Zynq-7000 series SoC by uploading and running the U-Boot
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| /Zephyr-latest/boards/weact/stm32f405_core/doc/ |
| D | index.rst | 6 The WeAct STM32F405 Core Board is an extremely low cost and bare-bones
26 - 3x12-bit, 2.4 MSPS ADC up to 24 channels and 7.2 MSPS in triple interleaved mode
29 - Up to 17 Timers (twelve 16-bit, two 32-bit, two watchdog timers and a SysTick timer)
36 - USB 2.0 high-speed/full-speed device/host/OTG controller with on-chip full-speed PHY and ULPI
72 derived from HSE, and is set at 168MHz, which is the maximum possible frequency
75 Programming and Debugging
79 bootloader, and another by using the SWD debug port (which requires additional
98 Connect a USB-C cable and the board should power ON. Force the board into DFU mode
99 by keeping the BOOT0 switch pressed while pressing and releasing the NRST switch.
101 The dfu-util runner is supported on this board and so a sample can be built and
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| /Zephyr-latest/boards/st/st25dv_mb1283_disco/doc/ |
| D | index.rst | 11 The ST25DV-DISCOVERY is a demonstration kit to evaluate the features and capabilities
14 and a STM32 processor driving a mother board.
33 - On board ST link for microcontroller firmware upgrade and debug
38 Wi-Fi ® module and JTAG 20 pin connector
40 It exists in two variants, MB1283 and MB1285.
50 The antenna board can be removed, and its 14-pin 0.254mm header connector used as an eval kit heade…
52 Connections and IOs
77 The Zephyr console output and shell are assigned to UART6, which is connected to the
81 Programming and Debugging
84 Applications for the ``st25dv_mb1283_disco`` board configuration can be built and
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| /Zephyr-latest/samples/boards/nordic/mesh/onoff-app/ |
| D | README.rst | 11 Each element has a mesh onoff client and server
12 model which controls one of the 4 sets of buttons and LEDs .
17 corresponding LED and does not initiate any mesh activity.
19 The models for button 1 and LED 1 are in the node's root element.
22 the secondary elements will appear at 0x101, 0x102 and 0x103.
25 be configured to publish and the LED servers to subscribe.
32 sends an "off" message. The buttons are quite noisy and are debounced in
35 using one button for "on" and another for "off" would reduce the number
44 Building and Running
62 binds button 2 and LED 1 to application key 1. It then configures button 2
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| /Zephyr-latest/boards/sparkfun/thing_plus_matter_mgm240p/doc/ |
| D | index.rst | 27 - Supports Multiple 802.15.4 Wireless Protocols (Zigbee and OpenThread)
29 - Crystals for LFXO (32 kHz) and HFXO (39 MHz).
31 For more information about the EFR32MG24 SoC and BRD2601B board, refer to these
67 Connections and IOs
71 means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
95 The EFR32MG24 SoC has one USART and two EUSARTs.
96 USART0 is connected to the board controller and is used for the console.
98 Programming and Debugging
109 Build the Zephyr kernel and application:
116 Connect the sparkfun_thing_plus_mgm240p to your host computer using the USB port and you
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| /Zephyr-latest/boards/st/stm32f0_disco/doc/ |
| D | index.rst | 6 The STM32F0 Discovery development board uses an STM32F051R8T6 MCU and
7 integrates the ST-LINK/V2-1 debugger and programmer. It also comes with a
8 comprehensive STM32 software HAL library and various packaged software
21 ST-LINK/V2 (with SWD connector for programming and debugging)
23 - External application power supply: 3 V and 5 V
30 - Two push buttons (user and reset)
32 and easy probing
34 connector for even easier prototyping and probing.
45 Connections and IOs
63 Programming and Debugging
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| /Zephyr-latest/boards/nxp/lpcxpresso51u68/doc/ |
| D | index.rst | 17 - On-board high-speed USB based debug probe with CMSIS-DAP and J-Link protocol
22 - Expansion options based on Arduino UNO and PMOD™, plus additional expansion
45 | CLOCK | on-chip | clock and reset control |
59 Connections and IOs
90 Programming and Debugging
93 Build and flash applications as usual (see :ref:`build_an_application` and
99 A debug probe is used for both flashing and debugging the board. This board is
107 Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
151 Open a serial terminal, step through the application in your debugger, and you
163 …xp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/high-per…
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| /Zephyr-latest/boards/adi/ad_swiot1l_sl/doc/ |
| D | index.rst | 5 The AD-SWIOT1L-SL is a complete hardware and software platform for prototyping intelligent,
7 control, and intelligent buildings.
24 - 120MHz High-Speed and 50MHz Low-Power Oscillators
26 - 32.768kHz and RTC Clock (Requires External Crystal)
30 - Five Low-Power Modes: Active, Sleep, Background, Deep Sleep, and Backup
31 - 1.8V and 3.3V I/O with No Level Translators
68 - On-Board 3.3V, 1.8V, and 1.1V voltage regulators
85 | CLOCK | on-chip | clock and reset control |
92 Programming and Debugging
110 appropriate adapter board and cable
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| /Zephyr-latest/samples/drivers/spi_flash_at45/ |
| D | README.rst | 10 This sample shows how to use the AT45 family DataFlash driver and how to
14 increasing (and overflowing at the 8-bit range) values and then reads it back
25 the Read-Modify-Write functionality of DataFlash chips and does not perform
34 It can be easily adjusted to be usable on other boards and with other
37 Building and Running
42 To build and flash the application:
50 To build and flash with device power management enabled:
59 To build and flash with flash page layout enabled:
68 Finally, to build and flash with both device power management and flash page
81 This is a typical output when both device power management and flash page
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