Searched +full:wkpu +full:- +full:interrupt +full:- +full:source (Results 1 – 2 of 2) sorted by relevance
1 # Copyright 2022-2023 NXP2 # SPDX-License-Identifier: Apache-2.08 to either the SIUL2 EIRQ interrupt controller or, when available on the SoC,9 the WKPU interrupt controller. By default, GPIO interrupts are routed to the10 SIUL2 EIRQ interrupt controller.12 To route external interrupts to the WKPU interrupt controller, the GPIO14 the following snippet of devicetree source code instructs the GPIO controller15 to route the interrupt from pin 9 of `gpioa` to the WKPU interrupt controller:17 #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h>23 Explicitly specifying the routing of a GPIO interrupt to a particular[all …]
2 * Copyright 2023-2024 NXP4 * SPDX-License-Identifier: Apache-2.07 #include <arm/armv7-m.dtsi>9 #include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h>10 #include <zephyr/dt-bindings/i2c/i2c.h>14 #address-cells = <1>;15 #size-cells = <0>;19 compatible = "arm,cortex-m7";25 compatible = "arm,cortex-m7";30 compatible = "arm,armv7m-mpu";[all …]
