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/Zephyr-Core-3.5.0/dts/arm/microchip/mec172x/
Dmec172x-vw-routing.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 mchp-xec-espi-vw-routing {
12 compatible = "microchip,xec-espi-vw-routing";
14 /* eSPI Virtual Vire (VW) routing */
16 /* Host-index MSVW/SMVW MSVW/SMVW-index source */
17 vw-reg = <0x02 MSVW 0 0>;
18 vw-girq = <24 0>;
22 vw-reg = <0x02 MSVW 0 1>;
23 vw-girq = <24 1>;
27 vw-reg = <0x02 MSVW 0 2>;
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/Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/
Dnpcx-espi-vws-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/espi/npcx_espi.h>
11 * |--------------------------------------------------------------------------|
12 * | VW idx | SLV reg | Wire Bit 3 | Wire Bit 2 | Wire Bit 1| Wire Bit 0 |
13 * |--------------------------------------------------------------------------|
14 * | Input (Master-to-Slave) Virtual Wires |
15 * |--------------------------------------------------------------------------|
21 * |--------------------------------------------------------------------------|
22 * | Output (Slave-to-Master) Virtual Wires |
23 * |--------------------------------------------------------------------------|
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Dnpcx9.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include "npcx9/npcx9-alts-map.dtsi"
10 #include "npcx9/npcx9-miwus-wui-map.dtsi"
12 #include "npcx9/npcx9-miwus-int-map.dtsi"
13 /* NPCX9 series eSPI VW mapping table */
14 #include "npcx9/npcx9-espi-vws-map.dtsi"
15 /* NPCX9 series low-voltage io controls mapping table */
16 #include "npcx9/npcx9-lvol-ctrl-map.dtsi"
22 def-io-conf-list {
61 compatible = "nuvoton,npcx9", "nuvoton,npcx", "simple-bus";
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Dnpcx7.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include "npcx7/npcx7-alts-map.dtsi"
10 #include "npcx7/npcx7-miwus-wui-map.dtsi"
12 #include "npcx7/npcx7-miwus-int-map.dtsi"
13 /* NPCX7 series eSPI VW mapping table */
14 #include "npcx7/npcx7-espi-vws-map.dtsi"
15 /* NPCX7 series low-voltage io controls mapping table */
16 #include "npcx7/npcx7-lvol-ctrl-map.dtsi"
22 def-io-conf-list {
60 compatible = "nuvoton,npcx7", "nuvoton,npcx", "simple-bus";
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Dnpcx4.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include "npcx4/npcx4-alts-map.dtsi"
10 #include "npcx4/npcx4-miwus-wui-map.dtsi"
12 #include "npcx4/npcx4-miwus-int-map.dtsi"
13 /* npcx4 series eSPI VW mapping table */
14 #include "npcx4/npcx4-espi-vws-map.dtsi"
15 /* npcx4 series low-voltage io controls mapping table */
16 #include "npcx4/npcx4-lvol-ctrl-map.dtsi"
22 def-io-conf-list {
62 compatible = "nuvoton,npcx4", "nuvoton,npcx", "simple-bus";
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Dnpcx.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/adc/adc.h>
11 #include <zephyr/dt-bindings/clock/npcx_clock.h>
12 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pinctrl/npcx-pinctrl.h>
16 #include <zephyr/dt-bindings/pwm/pwm.h>
17 #include <zephyr/dt-bindings/sensor/npcx_tach.h>
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/Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/npcx4/
Dnpcx4-espi-vws-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* Common eSPI Virtual Wire (VW) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-espi-vws-map.dtsi>
11 * Specific eSPI Virtual Wire (VW) mapping configurations in npcx4 series
12 * |--------------------------------------------------------------------------|
13 * | VW idx | SLV reg | Wire Bit 3 | Wire Bit 2 | Wire Bit 1| Wire Bit 0 |
14 * |--------------------------------------------------------------------------|
15 * | Output (Slave-to-Master) Virtual Wires (High at reset state) |
16 * |--------------------------------------------------------------------------|
19 * |--------------------------------------------------------------------------|
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/Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/npcx9/
Dnpcx9-espi-vws-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* Common eSPI Virtual Wire (VW) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-espi-vws-map.dtsi>
11 * Specific eSPI Virtual Wire (VW) mapping configurations in npcx9 series
12 * |--------------------------------------------------------------------------|
13 * | VW idx | SLV reg | Wire Bit 3 | Wire Bit 2 | Wire Bit 1| Wire Bit 0 |
14 * |--------------------------------------------------------------------------|
15 * | Output (Slave-to-Master) Virtual Wires (High at reset state) |
16 * |--------------------------------------------------------------------------|
19 * |--------------------------------------------------------------------------|
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/Zephyr-Core-3.5.0/dts/bindings/espi/
Dnuvoton,npcx-espi-vw-conf.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Nuvoton NPCX eSPI Virtual Wire (VW) mapping child node
6 compatible: "nuvoton,npcx-espi-vw-conf"
8 child-binding:
10 Child node to to present the mapping between VW signal, its core register and input source of
14 vw-reg:
17 description: vw signal's register index and vw bitmask.
19 vw-wui:
22 Mapping table between Wake-Up Input (WUI) and vw input signal.
25 vw-wui = <&wui_vw_slp_s5>;
Dmicrochip,xec-espi-vw-routing.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "microchip,xec-espi-vw-routing"
10 child-binding:
13 VW registers and ECIA GIRQ registers.
15 vw-reg:
18 description: vw signal's register index and vw bitmask.
20 vw-girq:
26 to GIRQ24 b[5]. vw-girq = <24 5>;
28 reset-state:
34 - "HW_DFLT"
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/Zephyr-Core-3.5.0/dts/arm/microchip/
Dmec1727nsz.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
12 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
15 #include "mec172x/mec172x-vw-routing.dtsi"
16 #include "mec172x/mec172xnsz-pinctrl.dtsi"
20 reg = <0x60000000 0x80000>;
26 clock-frequency = <12000000>;
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Dmec172xnsz.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/gpio/microchip-xec-gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
18 #include "mec172x/mec172x-vw-routing.dtsi"
22 #address-cells = <1>;
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/Zephyr-Core-3.5.0/drivers/espi/
Despi_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
34 * length specified is non-zero.
116 * ------------------------------------------------------------------------|
117 * VW Idx | VW reg | SRC_ID3 | SRC_ID2 | SRC_ID1 | SRC_ID0 |
118 * ------------------------------------------------------------------------|
120 * ------------------------------------------------------------------------|
127 * ------------------------------------------------------------------------|
129 * ------------------------------------------------------------------------|
231 uint8_t cap0 = ESPI_CAP_REGS->GLB_CAP0; in espi_xec_configure()
232 uint8_t cap1 = ESPI_CAP_REGS->GLB_CAP1; in espi_xec_configure()
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Despi_mchp_xec_v2.c5 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
40 * length specified is non-zero.
61 ((struct espi_iom_regs *)ESPI_XEC_CONFIG(dev)->base_addr)
64 ((struct espi_msvw_ar_regs *)(ESPI_XEC_CONFIG(dev)->vw_base_addr))
70 (ESPI_XEC_CONFIG(dev)->vw_base_addr + ESPI_XEC_SMVW_REG_OFS))
77 * ------------------------------------------------------------------------|
78 * VW Idx | VW reg | SRC_ID3 | SRC_ID2 | SRC_ID1 | SRC_ID0 |
79 * ------------------------------------------------------------------------|
81 * ------------------------------------------------------------------------|
[all …]
Dhost_subs_npcx.c4 * SPDX-License-Identifier: Apache-2.0
13 * This file contains the drivers of NPCX Host Sub-Modules that serve as an
16 * +------------+
17 * | Serial |---> TXD
18 * +<--->| Port |<--- RXD
19 * | | |<--> ...
20 * | +------------+
21 * | +------------+ |
22 * +------------+ |<--->| KBC & PM |<--->|
23 * eSPI_CLK --->| eSPI Bus | | | Channels | |
[all …]
/Zephyr-Core-3.5.0/dts/riscv/ite/
Dit8xxx2.dtsi3 * Copyright (c) 2019-2020 Jyunlin Chen <jyunlin.chen@ite.com.tw>
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/dt-util.h>
10 #include <zephyr/dt-bindings/adc/adc.h>
11 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
12 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/i2c/it8xxx2-i2c.h>
15 #include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
16 #include <zephyr/dt-bindings/pwm/pwm.h>
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/Zephyr-Core-3.5.0/soc/riscv/riscv-ite/common/
Dchip_chipregs.h3 * SPDX-License-Identifier: Apache-2.0
27 #define SET_MASK(reg, bit_mask) ((reg) |= (bit_mask)) argument
28 #define CLEAR_MASK(reg, bit_mask) ((reg) &= (~(bit_mask))) argument
29 #define IS_MASK_SET(reg, bit_mask) (((reg) & (bit_mask)) != 0) argument
44 /* --- General Control (GCTRL) --- */
226 /* 0x049: PWM Output Open-Drain Enable */
241 /* --- Wake-Up Control (WUC) --- */
244 /* TODO: should a defined interface for configuring wake-up interrupts */
398 * 24-bit timers: external timer 3, 5, and 7
399 * 32-bit timers: external timer 4, 6, and 8
[all …]
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Despi.h4 * SPDX-License-Identifier: Apache-2.0
44 *+----------------------------------------------------------------------+
46 *| eSPI host +-------------+ |
47 *| +-----------+ | Power | +----------+ |
49 *| +------------+ |processor | | controller | | sources | |
50 *| | SPI flash | +-----------+ +-------------+ +----------+ |
52 *| +------------+ | | | |
53 *| | | | +--------+ +---------------+ |
55 *| | | +-----+ +--------+ +----------+ +----v-----+ |
58 *| | | | +--------+ +----------+ +----------+ |
[all …]
Despi_saf.h4 * SPDX-License-Identifier: Apache-2.0
33 *+----------------------------------------------------------------------+
35 *| eSPI host +-------------+ |
36 *| +-----------+ | Power | +----------+ |
38 *| ------------ |processor | | controller | | sources | |
39 *| +-----------+ +-------------+ +----------+ |
41 *| ------------ | | | |
42 *| +--------+ +---------------+ |
44 *| -----+ +--------+ +----------+ +----v-----+ |
47 *| | +--------+ +----------+ +----------+ |
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