Home
last modified time | relevance | path

Searched +full:tcm +full:- +full:write +full:- +full:wait +full:- +full:mode (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/dts/bindings/memory-controllers/
Dnxp,flexram.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP FlexRAM on-chip ram controller
17 flexram,has-magic-addr:
24 flexram,num-ram-banks:
30 flexram,bank-size:
36 flexram,bank-spec:
44 flexram,tcm-read-wait-mode:
47 TCM RAM read will finish in 2 cycles instead of 1.
49 flexram,tcm-write-wait-mode:
52 TCM RAM write will finish in 2 cycles instead of 1.
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dsoc.c2 * Copyright 2021-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/linker/linker-defs.h>
25 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
33 memcpy((uint32_t *)((SEGMENT_LMA_ADDRESS_##n) - ADJUSTED_LMA), \
47 /* Dual core mode is enabled, and messaging unit is present */
72 "ARM PLL must have clock-mult property");
74 "ARM PLL must have clock-div property");
173 /* Check if FBB need to be enabled in OverDrive(OD) mode */ in clock_init()
174 if (((OCOTP->FUSEN[7].FUSE & 0x10U) >> 4U) != 1) { in clock_init()
[all …]