| /Zephyr-Core-3.5.0/dts/bindings/display/panel/ |
| D | panel-timing.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 a panel under display-timings node. For example:
12 display-timings {
13 compatible = "zephyr,panel-timing";
14 hsync-len = <8>;
15 hfront-porch = <32>;
16 hback-porch = <32>;
17 vsync-len = <2>;
18 vfront-porch = <16>;
19 vback-porch = <14>;
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| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | zephyr,gpio-emul.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,gpio-emul"
8 include: [gpio-controller.yaml, base.yaml]
14 rising-edge:
15 description: Enables support for rising edge interrupt detection
18 falling-edge:
19 description: Enables support for falling edge interrupt detection
22 high-level:
26 low-level:
30 "#gpio-cells":
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/ |
| D | gd32_exti.h | 4 * SPDX-License-Identifier: Apache-2.0
22 /** Trigger on rising edge */
24 /** Trigger on falling edge */
26 /** Trigger on rising and falling edge */
64 * @retval -EALREADY If callback is already set and @p cb is not NULL.
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| D | intc_xmc4xxx.h | 4 * SPDX-License-Identifier: Apache-2.0
15 * @param mode Level or edge interrupt
16 * @param trig Trigger edge type (falling, rising or both)
21 * @retval -ENOTSUP If the specific port_id/pin combination is not supported or
23 * @retval -EBUSY If the interrupt line is already used by a different port_id/pin
24 * @retval -EINVAL If the trigger combination is invalid
37 * @retval -EINVAL If the specific port_id and pin combination has no interrupt
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| D | exti_stm32.h | 2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
4 * SPDX-License-Identifier: Apache-2.0
12 * and STM32F107xx advanced ARM(r)-based 32-bit MCUs
15 * advanced ARM(r)-based 32-bit MCUs
48 /* trigger on rising edge */
50 /* trigger on falling edge */
52 /* trigger on falling edge */
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| D | nxp_pint.h | 4 * SPDX-License-Identifier: Apache-2.0
32 /* Generate Pin Interrupt on rising edge */
34 /* Generate Pin Interrupt on falling edge */
51 * 0-64, corresponding to GPIO0 pin 1 - GPIO1 pin 31)
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| D | sam0_eic.h | 4 * SPDX-License-Identifier: Apache-2.0
20 /* Rising edge */
22 /* Falling edge */
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| /Zephyr-Core-3.5.0/include/zephyr/dt-bindings/interrupt-controller/ |
| D | it8xxx2-wuc.h | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/dt-util.h>
19 /** WUC rising edge trigger mode */
21 /** WUC falling edge trigger mode */
23 /** WUC both edge trigger mode */
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| /Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
| D | nuvoton,npcx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
26 internal 3.3V pull-up if its i2c frequency won't exceed 400kHz.
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| D | ti,cc13xx-cc26xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
29 - drive-strength: Minimum current that can be sourced from the pin.
30 - input-enable: enable input.
31 - input-schmitt-enable: enable input schmitt circuit.
32 - ti,input-edge-detect: enable and configure edge detection interrupts
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| /Zephyr-Core-3.5.0/dts/bindings/watchdog/ |
| D | ti,tps382x.yaml | 10 wdi-gpios:
11 type: phandle-array
17 when WDI sees a rising edge or a falling edge. If unused, the WDI
21 timeout-period:
25 Time-out period in milliseconds. Typical for TPS3823/4/8 and TPS3823A is
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| /Zephyr-Core-3.5.0/drivers/serial/ |
| D | Kconfig.altera | 2 # SPDX-License-Identifier: Apache-2.0
23 Enabling this will cause the transmitter to wait for rising edge of CTS before sending.
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_enable_disable_interrupt/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
40 zassert_true(gpio_is_ready_dt(fixture->irq_spec), "GPIO device is not ready"); in gpio_enable_disable_interrupt_before()
42 zassert_ok(gpio_pin_configure_dt(fixture->irq_spec, GPIO_INPUT)); in gpio_enable_disable_interrupt_before()
43 zassert_ok(gpio_emul_input_set(fixture->irq_spec->port, fixture->irq_spec->pin, 0), in gpio_enable_disable_interrupt_before()
47 zassert_ok(gpio_pin_interrupt_configure_dt(fixture->irq_spec, GPIO_INT_DISABLE)); in gpio_enable_disable_interrupt_before()
48 gpio_init_callback(&cb_data, callback, BIT(fixture->irq_spec->pin)); in gpio_enable_disable_interrupt_before()
49 zassert_ok(gpio_add_callback(fixture->irq_spec->port, &cb_data), "failed to add callback"); in gpio_enable_disable_interrupt_before()
57 zassert_ok(gpio_remove_callback(fixture->irq_spec->port, &cb_data), in gpio_enable_disable_interrupt_after()
75 zassert_ok(gpio_emul_input_set(irq_spec->port, irq_spec->pin, 1), in trigger_callback()
82 enable_interrupt(fixture->irq_spec); in ZTEST_F()
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/reg/ |
| D | mec172x_qspi.h | 4 * SPDX-License-Identifier: Apache-2.0
24 /* Mode 0: Clock idle = Low. Data change falling edge, sample rising edge */
26 /* Mode 1: Clock idle = Low. Data change rising edge, sample falling edge */
28 /* Mode 2: Clock idle = High. Data change rising edge, sample falling edge */
30 /* Mode 3: Clock idle = High. Data change falling edge, sample rising edge */
140 /* MOSI data changes on first clock edge of clock pulse */
142 /* MOSI data changes on second clock edge of clock pulse */
146 /* MISO data capture on first clock edge of clock pulse */
148 /* MISO data capture on second clock edge of clock pulse */
368 /* Each Local DMA channel implements 4 32-bit registers.
[all …]
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| /Zephyr-Core-3.5.0/dts/bindings/display/ |
| D | ftdi,ft800.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 include: spi-device.yaml
11 irq-gpios:
12 type: phandle-array
28 the rising edge. If it is set to one, PCLK polarity is on
29 the falling edge.
36 edge. When set to 0, R[7:2],G[7:2] and B[7:2] signals change
37 following the active edge of PCLK. When set to 1, R[7:2]
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| /Zephyr-Core-3.5.0/include/zephyr/dt-bindings/pinctrl/ |
| D | cc13xx_cc26xx-pinctrl.h | 2 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
4 * SPDX-License-Identifier: Apache-2.0
60 /* Edge Detection */
61 #define IOC_NO_EDGE 0x00000000 /* No edge detection */
62 #define IOC_FALLING_EDGE 0x00010000 /* Edge detection on falling edge */
63 #define IOC_RISING_EDGE 0x00020000 /* Edge detection on rising edge */
64 #define IOC_BOTH_EDGES 0x00030000 /* Edge detection on both edges */
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| /Zephyr-Core-3.5.0/tests/drivers/gpio/gpio_basic_api/src/ |
| D | test_callback_trigger.c | 4 * SPDX-License-Identifier: Apache-2.0
25 && (dd->mode == GPIO_INT_EDGE_BOTH)) { in callback()
63 drv_data->mode = mode; in test_callback()
64 gpio_init_callback(&drv_data->gpio_cb, callback, BIT(PIN_IN)); in test_callback()
65 rc = gpio_add_callback(dev, &drv_data->gpio_cb); in test_callback()
66 if (rc == -ENOTSUP) { in test_callback()
77 if (rc == -ENOTSUP) { in test_callback()
93 TC_ERROR("double edge not detected\n"); in test_callback()
100 TC_ERROR("edge not trigger callback correctly\n"); in test_callback()
112 gpio_remove_callback(dev, &drv_data->gpio_cb); in test_callback()
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| /Zephyr-Core-3.5.0/soc/arm/cypress/common/ |
| D | soc_gpio.h | 2 * Copyright (c) 2016-2017 Piotr Mienkowski
4 * SPDX-License-Identifier: Apache-2.0
8 * @brief Cypress PSoC-6 MCU family General Purpose Input Output (GPIO)
34 /* Push-Pull means Strong, see dts/pinctrl/pincfg-node.yaml */
37 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
55 /** Interrupt is triggered by an edge detection event. */
57 /** Interrupt is triggered by any edge detection event. */
60 /** Interrupt is triggered by a high level / rising edge detection event */
78 * - configure pin(s) as input with debounce filter enabled.
79 * - connect pin(s) to a HSIOM function and enable pull-up.
[all …]
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| /Zephyr-Core-3.5.0/dts/bindings/mtd/ |
| D | nordic,qspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 compatible: "nordic,qspi-nor"
9 include: [base.yaml, "jedec,spi-nor-common.yaml"]
11 on-bus: qspi
17 jedec-id:
23 The size in bits. Set this or size-in-bytes, but not both.
25 size-in-bytes:
31 quad-enable-requirements:
37 - "fastread" # Single data line SPI, FAST_READ (0x0B)
38 - "read2o" # Dual data line SPI, READ2O (0x3B)
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| /Zephyr-Core-3.5.0/soc/arm/nuvoton_npcx/common/ |
| D | soc_miwu.h | 4 * SPDX-License-Identifier: Apache-2.0
48 NPCX_MIWU_TRIG_LOW, /** Edge failing or active low detection */
49 NPCX_MIWU_TRIG_HIGH, /** Edge rising or active high detection */
50 NPCX_MIWU_TRIG_BOTH, /** Both edge rising and failing detection */
60 * @brief NPCX wake-up input source structure
62 * Used to indicate a Wake-Up Input source (WUI) belongs to which group and bit
63 * of Multi-Input Wake-Up Unit (MIWU) modules.
72 * Define npcx miwu driver callback handler signature for wake-up input source
90 struct npcx_wui wui; /** Wake-up input source of GPIO */
104 const struct device *source; /** Wake-up input source */
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| /Zephyr-Core-3.5.0/drivers/adc/ |
| D | adc_ads7052.c | 5 * SPDX-License-Identifier: Apache-2.0
43 const struct ads7052_config *config = dev->config; in adc_ads7052_channel_setup()
45 if (channel_cfg->gain != ADC_GAIN_1) { in adc_ads7052_channel_setup()
46 LOG_ERR("unsupported channel gain '%d'", channel_cfg->gain); in adc_ads7052_channel_setup()
47 return -ENOTSUP; in adc_ads7052_channel_setup()
50 if (channel_cfg->reference != ADC_REF_VDD_1) { in adc_ads7052_channel_setup()
51 LOG_ERR("unsupported channel reference '%d'", channel_cfg->reference); in adc_ads7052_channel_setup()
52 return -ENOTSUP; in adc_ads7052_channel_setup()
55 if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) { in adc_ads7052_channel_setup()
56 LOG_ERR("unsupported acquisition_time '%d'", channel_cfg->acquisition_time); in adc_ads7052_channel_setup()
[all …]
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| /Zephyr-Core-3.5.0/drivers/gpio/ |
| D | gpio_xlnx_ps_bank.c | 6 * SPDX-License-Identifier: Apache-2.0
31 * - Pull up
32 * - Pull down
33 * - Open drain
34 * - Open source.
42 * -EINVAL if the specified pin index is out of range,
43 * -ENOTSUP if the pin configuration data contains a flag
50 const struct gpio_xlnx_ps_bank_dev_cfg *dev_conf = dev->config; in gpio_xlnx_ps_pin_configure()
60 return -ENOTSUP; in gpio_xlnx_ps_pin_configure()
84 * -> Write the initial output value into the data register. in gpio_xlnx_ps_pin_configure()
[all …]
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/common/reg/ |
| D | mec_tach.h | 4 * SPDX-License-Identifier: Apache-2.0
32 /* Select read mode. Latch data on rising edge of selected trigger */
54 /* Read-only latched TACH pulse counter */
61 * bits[0, 2-3] are R/W1C
62 * bit[1] is Read-Only
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| /Zephyr-Core-3.5.0/dts/bindings/sensor/ |
| D | espressif,esp32-pcnt.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 rising and/or falling edges of an input signal.
14 Each pulse counter unit has a 16-bit signed counter register.
29 Example: Use PCNT to read a rotary-enconder
38 bias-pull-up;
43 Note: Check espressif,esp32-pinctrl.yaml for complete documentation regarding pinctrl.
48 pinctrl-0 = <&pcnt_default>;
49 pinctrl-names = "default";
51 #address-cells = <1>;
52 #size-cells = <0>;
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| /Zephyr-Core-3.5.0/soc/arm/atmel_sam/common/ |
| D | soc_sam4l_gpio.c | 3 * SPDX-License-Identifier: Apache-2.0
7 * @brief Atmel SAM MCU family General-Purpose Input/Output Controller (GPIO)
20 gpio->IERC = mask; in configure_common_attr()
22 /* Configure pull-up(s) */ in configure_common_attr()
24 gpio->PUERS = mask; in configure_common_attr()
26 gpio->PUERC = mask; in configure_common_attr()
29 /* Configure pull-down(s) */ in configure_common_attr()
31 gpio->PDERS = mask; in configure_common_attr()
33 gpio->PDERC = mask; in configure_common_attr()
36 /* Configure open drain (multi-drive) */ in configure_common_attr()
[all …]
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