Searched +full:power +full:- +full:gpios (Results 1 – 25 of 132) sorted by relevance
123456
/Zephyr-Core-2.7.6/dts/bindings/lora/ |
D | semtech,sx127x-base.yaml | 3 # SPDX-License-Identifier: Apache-2.0 5 include: spi-device.yaml 8 reset-gpios: 9 type: phandle-array 14 This signal is open-drain, active-high (SX1272/3) or 15 active-low (SX1276/7/8/9) as interpreted by the modem. 17 dio-gpios: 18 type: phandle-array 23 These signals are normally active-high. 25 power-amplifier-output: [all …]
|
D | semtech,sx126x-base.yaml | 3 # SPDX-License-Identifier: Apache-2.0 5 include: spi-device.yaml 8 reset-gpios: 9 type: phandle-array 14 This signal is open-drain, active-low as interpreted by the 17 busy-gpios: 18 type: phandle-array 23 antenna-enable-gpios: 24 type: phandle-array 27 Antenna power enable pin. [all …]
|
/Zephyr-Core-2.7.6/tests/drivers/build_all/modem/ |
D | uart.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 mdm-reset-gpios = <&test_gpio 0 0>; 13 mdm-wake-gpios = <&test_gpio 0 0>; 14 mdm-pwr-on-gpios = <&test_gpio 0 0>; 15 mdm-fast-shutd-gpios = <&test_gpio 0 0>; 16 mdm-uart-dsr-gpios = <&test_gpio 0 0>; 17 mdm-uart-cts-gpios = <&test_gpio 0 0>; 18 mdm-gpio6-gpios = <&test_gpio 0 0>; 19 mdm-vgpio-gpios = <&test_gpio 0 0>; 24 label = "wnc-m14a2a"; [all …]
|
/Zephyr-Core-2.7.6/dts/bindings/base/ |
D | power.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 # Properties for nodes with controllable power supplies. 7 supply-gpios: 8 type: phandle-array 11 GPIO specifier that controls power to the device. 14 switch that controls power to the device. The supply state is 17 Contrast with vin-supply. 19 vin-supply: 23 Reference to the regulator that controls power to the device. 26 This property should be provided when device power is supplied [all …]
|
/Zephyr-Core-2.7.6/boards/arm/nucleo_wl55jc/ |
D | nucleo_wl55jc.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wl/stm32wl55jcix-pinctrl.dtsi> 13 model = "STMicroelectronics STM32WL55JC-NUCLEO board"; 14 compatible = "st,stm32wl55-nucleo"; 18 zephyr,shell-uart = &lpuart1; 21 zephyr,code-partition = &flash0; 25 compatible = "gpio-leds"; 27 gpios = <&gpiob 15 GPIO_ACTIVE_HIGH>; 31 gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>; [all …]
|
/Zephyr-Core-2.7.6/samples/drivers/espi/dts/bindings/ |
D | mec15xx-board-power.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 compatible: "microchip,mec15xx-board-power" 7 This binding provides MEC15xx board gpio power rails resources to 9 GPIOs required before performing a eSPI host-slave handshake 12 pwrg-gpios: 13 type: phandle-array 16 Board GPIO input used to detect that power rails are stable. 18 rsm-gpios: 19 type: phandle-array 23 power has stabilized and bare minimum initialization in eSPI slave
|
/Zephyr-Core-2.7.6/boards/arm/stm32l562e_dk/ |
D | stm32l562e_dk_common.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <st/l5/stm32l562qeixq-pinctrl.dtsi> 13 compatible = "gpio-leds"; 15 gpios = <&gpiod 3 GPIO_ACTIVE_LOW>; 19 gpios = <&gpiog 12 GPIO_ACTIVE_LOW>; 25 compatible = "gpio-keys"; 28 gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; 32 power-states { 34 compatible = "zephyr,power-state"; 35 power-state-name = "suspend-to-idle"; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/cc1352r_sensortag/ |
D | cc1352r_sensortag.dts | 5 * SPDX-License-Identifier: Apache-2.0 8 /dts-v1/; 24 compatible = "ti,sensortag-cc1352r"; 41 zephyr,shell-uart = &uart0; 45 compatible = "gpio-leds"; 47 gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 51 gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 55 gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; 61 compatible = "gpio-keys"; 63 gpios = <&gpio0 15 BTN_GPIO_FLAGS>; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/b_l072z_lrwan1/ |
D | b_l072z_lrwan1.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/l0/stm32l072c(b-z)tx-pinctrl.dtsi> 12 model = "STMicroelectronics B-L072Z-LRWAN1 Discovery kit"; 13 compatible = "st,stm32l072z-lrwan1"; 17 zephyr,shell-uart = &usart2; 23 compatible = "gpio-leds"; 25 gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>; 29 gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>; 33 gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/cc1352r1_launchxl/ |
D | cc1352r1_launchxl.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 23 compatible = "ti,launchxl-cc1352r1"; 36 zephyr,shell-uart = &uart0; 40 compatible = "gpio-leds"; 42 gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 46 gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 52 compatible = "gpio-keys"; 54 gpios = <&gpio0 15 BTN_GPIO_FLAGS>; 58 gpios = <&gpio0 14 BTN_GPIO_FLAGS>; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/cc26x2r1_launchxl/ |
D | cc26x2r1_launchxl.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 23 compatible = "ti,launchxl-cc26x2r1"; 36 zephyr,shell-uart = &uart0; 40 compatible = "gpio-leds"; 42 gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 46 gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 52 compatible = "gpio-keys"; 54 gpios = <&gpio0 13 BTN_GPIO_FLAGS>; 58 gpios = <&gpio0 14 BTN_GPIO_FLAGS>; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/nucleo_wb55rg/ |
D | nucleo_wb55rg.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wb/stm32wb55rgvx-pinctrl.dtsi> 13 model = "STMicroelectronics STM32WB55RG-NUCLEO board"; 14 compatible = "st,stm32wb55rg-nucleo"; 18 zephyr,shell-uart = &usart1; 19 zephyr,bt-mon-uart = &lpuart1; 22 zephyr,code-partition = &slot0_partition; 25 power-states { 27 compatible = "zephyr,power-state"; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/particle_boron/ |
D | particle_boron.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 18 vctl1-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 20 * single inverter gate -- requires a definition below, 22 vctl2-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 26 &i2c1 { /* power monitoring */ 27 compatible = "nordic,nrf-twi"; 29 clock-frequency = <I2C_BITRATE_FAST>; 30 sda-pin = <24>; [all …]
|
/Zephyr-Core-2.7.6/dts/bindings/mtd/ |
D | atmel,at45.yaml | 2 # SPDX-License-Identifier: Apache-2.0 8 include: [spi-device.yaml] 11 jedec-id: 12 type: uint8-array 21 sector-size: 26 block-size: 31 page-size: 36 use-udpd: 40 When set, the driver will use the Ultra-Deep Power-Down command instead 41 of the default Deep Power-Down one to put the chip into low power mode. [all …]
|
/Zephyr-Core-2.7.6/boards/arm/mec15xxevb_assy6853/ |
D | mec15xxevb_assy6853.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 25 pwm-0 = &pwm0; 26 peci-0 = &peci0; 34 compatible = "gpio-leds"; 39 gpios = <&gpio_140_176 14 GPIO_ACTIVE_LOW>; 46 gpios = <&gpio_140_176 15 GPIO_ACTIVE_LOW>; 53 gpios = <&gpio_140_176 11 GPIO_ACTIVE_LOW>; 58 power-states { 60 compatible = "zephyr,power-state"; [all …]
|
/Zephyr-Core-2.7.6/boards/arm/nucleo_l476rg/ |
D | nucleo_l476rg.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/l4/stm32l476r(c-e-g)tx-pinctrl.dtsi> 13 model = "STMicroelectronics STM32L476RG-NUCLEO board"; 14 compatible = "st,stm32l476rg-nucleo"; 18 zephyr,shell-uart = &usart2; 23 power-states { 25 compatible = "zephyr,power-state"; 26 power-state-name = "suspend-to-idle"; 27 substate-id = <1>; [all …]
|
/Zephyr-Core-2.7.6/dts/bindings/modem/ |
D | quectel,bg9x.yaml | 2 # SPDX-License-Identifier: Apache-2.0 8 include: uart-device.yaml 14 mdm-power-gpios: 15 type: phandle-array 18 mdm-reset-gpios: 19 type: phandle-array 22 mdm-dtr-gpios: 23 type: phandle-array 26 mdm-wdisable-gpios: 27 type: phandle-array
|
D | wnc,m14a2a.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: WNC-M14A2A LTE-M modem 8 include: uart-device.yaml 14 mdm-boot-mode-sel-gpios: 15 type: phandle-array 18 mdm-power-gpios: 19 type: phandle-array 22 mdm-keep-awake-gpios: 23 type: phandle-array 26 mdm-reset-gpios: [all …]
|
D | u-blox,sara-r4.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: u-blox SARA-R4 modem 6 compatible: "u-blox,sara-r4" 8 include: uart-device.yaml 14 mdm-power-gpios: 15 type: phandle-array 18 mdm-reset-gpios: 19 type: phandle-array 22 mdm-vint-gpios: 23 type: phandle-array
|
/Zephyr-Core-2.7.6/drivers/serial/ |
D | Kconfig.nrfx | 3 # Copyright (c) 2016 - 2018, Nordic Semiconductor ASA 4 # SPDX-License-Identifier: Apache-2.0 21 DT_COMPAT_NORDIC_NRF_UART := nordic,nrf-uart 22 DT_COMPAT_NORDIC_NRF_UARTE := nordic,nrf-uarte 24 # ----------------- port 0 ----------------- 87 bool "Low power mode" 93 power consumption. It is only feasible if receiver is not always on. 104 If enabled, the driver will configure the GPIOs used by the uart to 105 their default configuration when device is powered down. The GPIOs 110 # ----------------- port 1 ----------------- [all …]
|
/Zephyr-Core-2.7.6/boards/shields/wnc_m14a2a/boards/ |
D | frdm_k64f.overlay | 4 * SPDX-License-Identifier: Apache-2.0 8 * WNC-M14A2A shield uses an odd UART available on *some* Arduino-R3-compatible 12 current-speed = <115200>; 13 hw-flow-control; 19 label = "wnc-m14a2a"; 20 mdm-boot-mode-sel-gpios = <&arduino_header 7 0>; /* D1 */ 21 mdm-power-gpios = <&arduino_header 8 0>; /* D2 */ 22 mdm-keep-awake-gpios = <&arduino_header 12 0>; /* D6 */ 23 mdm-reset-gpios = <&arduino_header 14 0>; /* D8 */ 24 mdm-shld-trans-ena-gpios = <&arduino_header 15 0>; /* D9 */
|
D | nrf52840dk_nrf52840.overlay | 4 * SPDX-License-Identifier: Apache-2.0 8 * WNC-M14A2A shield uses an odd UART available on *some* Arduino-R3-compatible 12 current-speed = <115200>; 13 hw-flow-control; 16 tx-pin = <46>; 17 rx-pin = <45>; 18 rts-pin = <44>; 19 cts-pin = <47>; 24 label = "wnc-m14a2a"; 25 mdm-boot-mode-sel-gpios = <&arduino_header 7 0>; /* D1 */ [all …]
|
/Zephyr-Core-2.7.6/boards/arm/mimxrt685_evk/ |
D | mimxrt685_evk_cm33.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 13 model = "NXP MIMXRT685-EVK board"; 22 usart-0 = &flexcomm0; 24 pwm-0 = &sc_timer; 25 pwm-led0 = &green_pwm_led; 26 green-pwm-led = &green_pwm_led; 27 blue-pwm-led = &blue_pwm_led; 28 red-pwm-led = &red_pwm_led; [all …]
|
/Zephyr-Core-2.7.6/soc/arm/microchip_mec/mec1501/ |
D | Kconfig.soc | 4 # SPDX-License-Identifier: Apache-2.0 20 bool "MEC1501 Power Management" 41 Say n to use the +/-2% internal silicon oscillator. 68 bool "VTR3 power rail is tied to 1.8V" 70 Set this is if VTR3 power sourcejumper in the board is changed. 73 bool "Use VCI block pins as GPIOS" 76 By default these pins are not GPIOs, but HW controlled. 91 pin is ignored. All other JTAG pins can be used as GPIOs 92 or other non-JTAG alternate functions. 97 JTAG port in SWD mode. UART2 and ADC00-03 can be used. [all …]
|
/Zephyr-Core-2.7.6/dts/bindings/display/ |
D | sitronix,st7735r.yaml | 1 # Copyright (c) 2020, Kim Bøndergaard <kim@fam-boendergaard.dk> 2 # SPDX-License-Identifier: Apache-2.0 8 include: spi-device.yaml 11 reset-gpios: 12 type: phandle-array 20 cmd-data-gpios: 21 type: phandle-array 39 x-offset: 44 y-offset: 60 type: uint8-array [all …]
|
123456