Searched full:numbered (Results 1 – 25 of 35) sorted by relevance
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/Zephyr-Core-3.5.0/dts/bindings/gpio/ |
D | mikro-bus.yaml | 15 numbered 0 - 5 (AN - MOSI), the right side pins are numbered 6 - 10
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D | ti,boosterpack-header.yaml | 14 numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21
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/Zephyr-Core-3.5.0/include/zephyr/arch/common/ |
D | ffs.h | 25 * numbered starting at 1 from the least significant bit. A return value of 47 * numbered starting at 1 from the least significant bit. A return value of
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/Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/ |
D | soc_port.c | 22 * even numbered pin goes in the bits 0..3 and the odd in soc_port_pinmux_set() 23 * numbered pin in bits 4..7. in soc_port_pinmux_set()
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/Zephyr-Core-3.5.0/scripts/native_simulator/common/src/ |
D | nsi_internal.h | 22 * numbered starting at 1 from the least significant bit. A return value of
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/Zephyr-Core-3.5.0/tests/benchmarks/sched/ |
D | README.rst | 20 between each numbered step and for the whole cycle, and a running
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/Zephyr-Core-3.5.0/subsys/logging/ |
D | Kconfig.template.log_format_config | 35 # Example : LOG_BACKEND_XXX_OUTPUT_TEXT should be numbered 0 across all backends
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/Zephyr-Core-3.5.0/dts/bindings/sensor/ |
D | espressif,esp32-pcnt.yaml | 11 The ESP32's PCNT module has 8 independent counting “units” numbered from 0 to 7. 12 ESP32S2 and ESP32S3 have 4 independent counting “units” numbered from 0 to 3.
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/Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
D | nuvoton,numicro-pinctrl.yaml | 8 and each numbered subgroup in the pin group defines all the pins for that
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D | openisa,rv32m1-pinctrl.yaml | 9 and each numbered subgroup in the pin group defines all the pins for that
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D | nxp,kinetis-pinctrl.yaml | 8 and each numbered subgroup in the pin group defines all the pins for that
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D | nxp,rt-iocon-pinctrl.yaml | 8 Each numbered subgroup represents pins with shared configuration for that
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D | nxp,s32k3-pinctrl.yaml | 11 and each numbered subgroup in the pin group defines all the pins for that
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D | nxp,lpc-iocon-pinctrl.yaml | 7 pin configuration defines a peripheral's pin configuration. Each numbered
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D | nxp,s32ze-pinctrl.yaml | 11 and each numbered subgroup in the pin group defines all the pins for that
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/Zephyr-Core-3.5.0/soc/arm/microchip_mec/common/reg/ |
D | mec_adc.h | 13 /* Eight ADC channels numbered 0 - 7 */
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/Zephyr-Core-3.5.0/tests/benchmarks/sched/src/ |
D | main.c | 28 * between each numbered step and for the whole cycle, and a running
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/Zephyr-Core-3.5.0/doc/contribute/documentation/ |
D | guidelines.rst | 81 For numbered lists 91 1. This is a new numbered list. If the wasn't a blank line before it, 95 a. This is a numbered list using alphabetic list headings 478 1. And for numbered list items, the continuation
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/Zephyr-Core-3.5.0/drivers/ethernet/ |
D | eth_xlnx_gem_priv.h | 552 /* The values of this enum are consecutively numbered */ 567 /* The values of this enum are consecutively numbered */ 582 /* The values of this enum are consecutively numbered */ 604 /* The values of this enum are consecutively numbered */
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/Zephyr-Core-3.5.0/arch/xtensa/core/ |
D | README-WINDOWS.rst | 96 By convention spill regions always store the lowest numbered register
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/Zephyr-Core-3.5.0/samples/subsys/portability/cmsis_rtos_v1/philosophers/src/ |
D | main.c | 150 /* Djkstra's solution: always pick up the lowest numbered fork first */ in philosopher()
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/Zephyr-Core-3.5.0/samples/kernel/metairq_dispatch/ |
D | README.rst | 35 * On average, higher priority (lower numbered) threads have better
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/Zephyr-Core-3.5.0/drivers/interrupt_controller/ |
D | intc_dw_ace.c | 22 * controller with 28 lines instantiated. They get numbered
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/Zephyr-Core-3.5.0/drivers/flash/ |
D | flash_stm32g0x.c | 205 * "physical" pages are numbered starting with 0 on bank1 and 256 on bank2.
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/Zephyr-Core-3.5.0/samples/subsys/portability/cmsis_rtos_v2/philosophers/src/ |
D | main.c | 175 /* Djkstra's solution: always pick up the lowest numbered fork first */ in philosopher()
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