Searched full:modes (Results 1 – 12 of 12) sorted by relevance
35 modes: [analog]37 modes: [analog]39 modes: [analog]41 modes: [analog]43 modes: [analog]45 modes: [analog]47 modes: [analog]49 modes: [analog]51 modes: [analog]53 modes: [analog][all …]
39 modes: [analog]41 modes: [analog]43 modes: [analog]45 modes: [analog]47 modes: [analog]49 modes: [analog]51 modes: [analog]53 modes: [analog]55 modes: [analog]57 modes: [analog][all …]
38 modes: [analog]40 modes: [analog]42 modes: [analog]45 modes: [analog]48 modes: [analog]51 modes: [analog]54 modes: [analog]57 modes: [analog]60 modes: [analog]62 modes: [analog][all …]
46 modes: [analog]48 modes: [analog]50 modes: [analog]52 modes: [analog]54 modes: [analog]56 modes: [analog]58 modes: [analog]60 modes: [analog]62 modes: [analog]64 modes: [analog][all …]
61 - `modes` (required): A list containing one or more of these modes: `analog`,94 modes: [analog]96 # 6, 4 and can operate in both 'inp' and 'out' modes.98 modes: [inp, out]
18 modes: [analog]20 modes: [out]22 modes: [inp]25 modes: [out, inp]28 modes: [out, inp]31 modes: [out, inp]34 modes: [out, inp]
383 …0000U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 5 ADC clock cyc…384 …0100U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 6 ADC clock cyc…385 …0200U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 7 ADC clock cyc…386 …0300U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 8 ADC clock cyc…387 …0400U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 9 ADC clock cyc…388 …0500U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 10 ADC clock cy…389 …0600U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 11 ADC clock cy…390 …0700U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 12 ADC clock cy…391 …0800U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 13 ADC clock cy…392 …0900U) /*!< the delay between 2 sampling phases in ADC synchronization modes to 14 ADC clock cy…[all …]
180 for mode in signal_cfg["modes"]:185 if len(signal_cfg["modes"]) > 1:
10 * @name GD32 pin modes
1143 \brief configure the delay between 2 sampling phases in ADC sync modes1144 \param[in] sample_delay: the delay between 2 sampling phases in ADC sync modes1146 …YNC_DELAY_xCYCLE: x=5..20,the delay between 2 sampling phases in ADC sync modes is x ADC clock cyc…
725 /* operation modes */1154 /* CAN operation modes */
392 /* configure the modes */ in can_operation_mode_enter()
