| /hal_espressif-3.7.0/components/mbedtls/ |
| D | Kconfig | 140 bool "Enable mbedTLS debugging"
143 Enable mbedTLS debugging functions at compile time.
147 at runtime in order to enable mbedTLS debug output via the ESP
216 Define this option only if you enable MBEDTLS_ECP_RESTARTABLE or if you
220 bool "Enable trusted certificate callbacks"
229 bool "Enable serialization of the TLS context structures"
233 Enable serialization of the TLS context structures
250 bool "Enable PKCS #7"
254 Enable PKCS #7 core for using PKCS #7-formatted signatures.
263 Enable support for the DTLS Connection ID extension which allows to
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| /hal_espressif-3.7.0/components/soc/esp32h2/include/soc/ |
| D | ledc_struct.h | 26 * Set this bit to enable signal output on channel n.
49 * This bit is used to enable the ovf_cnt of channel n.
77 * Ledc event task enable bit register0.
82 * Ledc ch0 duty change end event enable register, write 1 to enable this event.
86 * Ledc ch1 duty change end event enable register, write 1 to enable this event.
90 * Ledc ch2 duty change end event enable register, write 1 to enable this event.
94 * Ledc ch3 duty change end event enable register, write 1 to enable this event.
98 * Ledc ch4 duty change end event enable register, write 1 to enable this event.
102 * Ledc ch5 duty change end event enable register, write 1 to enable this event.
107 * Ledc ch0 overflow count pulse event enable register, write 1 to enable this event.
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| /hal_espressif-3.7.0/components/soc/esp32c6/include/soc/ |
| D | ledc_struct.h | 26 * Set this bit to enable signal output on channel n.
49 * This bit is used to enable the ovf_cnt of channel n.
77 * Ledc event task enable bit register0.
82 * Ledc ch0 duty change end event enable register, write 1 to enable this event.
86 * Ledc ch1 duty change end event enable register, write 1 to enable this event.
90 * Ledc ch2 duty change end event enable register, write 1 to enable this event.
94 * Ledc ch3 duty change end event enable register, write 1 to enable this event.
98 * Ledc ch4 duty change end event enable register, write 1 to enable this event.
102 * Ledc ch5 duty change end event enable register, write 1 to enable this event.
107 * Ledc ch0 overflow count pulse event enable register, write 1 to enable this event.
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| /hal_espressif-3.7.0/components/hal/esp32/include/hal/ |
| D | emac_ll.h | 124 /* Interrupt enable (referring to dmain_en register in emac_dma_struct.h) */
141 /* Enable needed interrupts (recv/recv_buf_unavailabal/normal must be enabled to make eth work) */
166 static inline void emac_ll_write_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_write_enable() argument
168 mac_regs->emacgmiiaddr.miiwrite = enable; in emac_ll_write_enable()
177 static inline void emac_ll_watchdog_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_watchdog_enable() argument
179 mac_regs->gmacconfig.watchdog = !enable; in emac_ll_watchdog_enable()
182 static inline void emac_ll_jabber_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_jabber_enable() argument
184 mac_regs->gmacconfig.jabber = !enable; in emac_ll_jabber_enable()
192 static inline void emac_ll_carrier_sense_enable(emac_mac_dev_t *mac_regs, bool enable) in emac_ll_carrier_sense_enable() argument
194 mac_regs->gmacconfig.disablecrs = !enable; in emac_ll_carrier_sense_enable()
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| D | rwdt_ll.h | 45 * @brief Enable the RWDT
137 * @brief Enable or disable RWDT edge interrupt
140 * @param enable Whether to enable edge interrupt
142 FORCE_INLINE_ATTR void rwdt_ll_set_edge_intr(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_edge_intr() argument
144 hw->wdt_config0.edge_int_en = (enable) ? 1 : 0; in rwdt_ll_set_edge_intr()
148 * @brief Enable or disable RWDT level interrupt
151 * @param enable Whether to enable level interrupt
153 FORCE_INLINE_ATTR void rwdt_ll_set_level_intr(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_level_intr() argument
155 hw->wdt_config0.level_int_en = (enable) ? 1 : 0; in rwdt_ll_set_level_intr()
181 * @brief Enable/Disable the RWDT flashboot mode.
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| D | i2s_ll.h | 62 * @brief Enable DMA descriptor owner check
65 * @param en whether to enable owner check
73 * @brief Enable DMA descriptor write back
76 * @param en whether to enable write back
87 * @param en True to enable, False to disable
95 * @brief I2S module general init, enable I2S clock.
120 * @brief I2S tx msb right enable
123 * @param enable Set true to enable tx msb right
125 static inline void i2s_ll_tx_enable_msb_right(i2s_dev_t *hw, bool enable) in i2s_ll_tx_enable_msb_right() argument
127 hw->conf.tx_msb_right = enable; in i2s_ll_tx_enable_msb_right()
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| D | brownout_ll.h | 24 * @param enable true: power down flash. false: not power down
26 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
28 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
34 * @param enable true: power down. false: not power done.
36 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
38 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
42 * @brief Enable this to reset brown out
46 * @param reset_ena true: enable reset. false: disable reset.
67 * @brief Set this bit to enable the brown out detection
69 * @param bod_enable true: enable, false: disable
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| /hal_espressif-3.7.0/components/bt/host/nimble/ |
| D | Kconfig.in | 131 bool "Enable BLE Central role"
138 bool "Enable BLE Peripheral role"
142 Enable peripheral role
145 bool "Enable BLE Broadcaster role"
152 bool "Enable BLE Observer role"
163 Enable this flag to make bonding persistent across device reboots
166 bool "Enable BLE SM feature"
170 Enable BLE sm feature
177 Enable security manager legacy pairing
184 Enable security manager secure connections
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| /hal_espressif-3.7.0/components/hal/include/hal/ |
| D | apm_hal.h | 43 * @brief TEE controller clock auto gating enable
45 * @param enable Flag for HP clock auto gating enable/disable
47 void apm_tee_hal_clk_gating_enable(bool enable);
50 * @brief enable/disable HP Region access permission filter
53 * @param enable Flag for Region access filter enable/disable
55 void apm_hp_hal_region_filter_enable(uint32_t regn_num, bool enable);
58 * @brief enable/disable HP access path(M[0:3])
61 * @param enable Flag for HP M path filter enable/disable
63 void apm_hp_hal_m_filter_enable(apm_ll_hp_access_path_t hp_m_path, bool enable);
95 * @brief Interrupt enable for access path(M[0:3])
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| /hal_espressif-3.7.0/components/hal/esp32s3/include/hal/ |
| D | rmt_ll.h | 45 * @brief Enable clock gate for register and memory
48 * @param enable True to enable, False to disable
50 static inline void rmt_ll_enable_periph_clock(rmt_dev_t *dev, bool enable) in rmt_ll_enable_periph_clock() argument
52 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_periph_clock()
53 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_periph_clock()
60 * @param enable True to power down, False to power up
62 static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable) in rmt_ll_power_down_mem() argument
64 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()
65 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()
69 * @brief Enable APB accessing RMT memory in nonfifo mode
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| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
70 * @brief Set this bit to enable the brown out detection
72 * @param bod_enable true: enable, false: disable
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| D | rwdt_ll.h | 25 /* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
67 * @brief Enable the RWDT
191 * @brief Enable/Disable the RWDT flashboot mode.
194 * @param enable True to enable RWDT flashboot mode, false to disable RWDT flashboot mode.
197 * WDT's enable bit is set to 0. Flashboot mode for RWDT is automatically enabled
200 FORCE_INLINE_ATTR void rwdt_ll_set_flashboot_en(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_flashboot_en() argument
202 hw->wdt_config0.flashboot_mod_en = (enable) ? 1 : 0; in rwdt_ll_set_flashboot_en()
206 * @brief Enable/Disable the CPU0 to be reset on WDT_STAGE_ACTION_RESET_CPU
209 * @param enable True to enable CPU0 to be reset, false to disable.
211 FORCE_INLINE_ATTR void rwdt_ll_set_procpu_reset_en(rtc_cntl_dev_t *hw, bool enable) in rwdt_ll_set_procpu_reset_en() argument
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| /hal_espressif-3.7.0/components/hal/esp32c6/include/hal/ |
| D | apm_ll.h | 98 * @brief TEE controller clock auto gating enable
100 * @param enable Flag for HP clock auto gating enable/disable
102 static inline void apm_tee_ll_clk_gating_enable(bool enable) in apm_tee_ll_clk_gating_enable() argument
104 if (enable) { in apm_tee_ll_clk_gating_enable()
112 * @brief enable/disable HP Region access permission filter
115 * @param enable Flag for Region access filter enable/disable
117 static inline void apm_hp_ll_region_filter_enable(uint32_t regn_num, bool enable) in apm_hp_ll_region_filter_enable() argument
119 if (enable) { in apm_hp_ll_region_filter_enable()
127 * @brief enable/disable HP access path(M[0:3])
130 * @param enable Flag for HP M path filter enable/disable
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| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
70 * @brief Set this bit to enable the brown out detection
72 * @param bod_enable true: enable, false: disable
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| D | rmt_ll.h | 46 * @brief Enable clock gate for register and memory
49 * @param enable True to enable, False to disable
51 static inline void rmt_ll_enable_periph_clock(rmt_dev_t *dev, bool enable) in rmt_ll_enable_periph_clock() argument
53 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_periph_clock()
54 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_periph_clock()
61 * @param enable True to power down, False to power up
63 static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable) in rmt_ll_power_down_mem() argument
65 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()
66 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()
70 * @brief Enable APB accessing RMT memory in nonfifo mode
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| /hal_espressif-3.7.0/components/hal/esp32h2/include/hal/ |
| D | apm_ll.h | 98 * @brief TEE controller clock auto gating enable
100 * @param enable Flag for HP clock auto gating enable/disable
102 static inline void apm_tee_ll_clk_gating_enable(bool enable) in apm_tee_ll_clk_gating_enable() argument
104 if (enable) { in apm_tee_ll_clk_gating_enable()
112 * @brief enable/disable HP Region access permission filter
115 * @param enable Flag for Region access filter enable/disable
117 static inline void apm_hp_ll_region_filter_enable(uint32_t regn_num, bool enable) in apm_hp_ll_region_filter_enable() argument
119 if (enable) { in apm_hp_ll_region_filter_enable()
127 * @brief enable/disable HP access path(M[0:3])
130 * @param enable Flag for HP M path filter enable/disable
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| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 LP_ANA_PERI.bod_mode0_cntl.bod_mode0_pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
70 * @brief Set this bit to enable the brown out detection
72 * @param bod_enable true: enable, false: disable
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| D | lpwdt_ll.h | 27 * @brief Enable the RWDT
152 * @brief Enable/Disable the RWDT flashboot mode.
155 * @param enable True to enable RWDT flashboot mode, false to disable RWDT flashboot mode.
158 * WDT's enable bit is set to 0. Flashboot mode for RWDT is automatically enabled
161 FORCE_INLINE_ATTR void lpwdt_ll_set_flashboot_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_flashboot_en() argument
163 // hw->config0.flashboot_mod_en = (enable) ? 1 : 0; in lpwdt_ll_set_flashboot_en()
167 * @brief Enable/Disable the CPU0 to be reset on WDT_STAGE_ACTION_RESET_CPU
170 * @param enable True to enable CPU0 to be reset, false to disable.
172 FORCE_INLINE_ATTR void lpwdt_ll_set_procpu_reset_en(lp_wdt_dev_t *hw, bool enable) in lpwdt_ll_set_procpu_reset_en() argument
174 // hw->config0.procpu_reset_en = (enable) ? 1 : 0; in lpwdt_ll_set_procpu_reset_en()
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| D | rmt_ll.h | 46 * @brief Enable clock gate for register and memory
49 * @param enable True to enable, False to disable
51 static inline void rmt_ll_enable_periph_clock(rmt_dev_t *dev, bool enable) in rmt_ll_enable_periph_clock() argument
53 dev->sys_conf.clk_en = enable; // register clock gating in rmt_ll_enable_periph_clock()
54 dev->sys_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_periph_clock()
61 * @param enable True to power down, False to power up
63 static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable) in rmt_ll_power_down_mem() argument
65 dev->sys_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()
66 dev->sys_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()
70 * @brief Enable APB accessing RMT memory in nonfifo mode
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| /hal_espressif-3.7.0/components/hal/esp32c2/include/hal/ |
| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
70 * @brief Set this bit to enable the brown out detection
72 * @param bod_enable true: enable, false: disable
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| /hal_espressif-3.7.0/components/hal/esp32c3/include/hal/ |
| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
70 * @brief Set this bit to enable the brown out detection
72 * @param bod_enable true: enable, false: disable
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| /hal_espressif-3.7.0/components/soc/esp32/include/soc/ |
| D | spi_struct.h | 27 …ggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
28 …ggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
29 …r define command enable. An operation will be triggered when the bit is set. The bit will be clea…
30 …nto high performance mode. The bit will be cleared once the operation done.1: enable 0: disable.*/
31 …and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.*/
32 …ggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
33 … /*Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be …
34 …ck erase enable(32KB) . Block erase operation will be triggered when the bit is set. The bit will…
35 …tor erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will …
36 …enable(1 byte ~256 bytes data to be programmed). Page program operation will be triggered when th…
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| /hal_espressif-3.7.0/components/soc/esp32c3/include/soc/ |
| D | spi_mem_struct.h | 19 …bined with spi_mem_usr bit. The bit will be cleared once the operation done.1: enable 0: disable.*/
20 …r define command enable. An operation will be triggered when the bit is set. The bit will be clea…
21 …nto high performance mode. The bit will be cleared once the operation done.1: enable 0: disable.*/
22 …and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.*/
23 …ggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
24 … /*Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be …
25 …ck erase enable(32KB) . Block erase operation will be triggered when the bit is set. The bit will…
26 …tor erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will …
27 …enable(1 byte ~256 bytes data to be programmed). Page program operation will be triggered when th…
28 …s register enable. Write status operation will be triggered when the bit is set. The bit will b…
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| /hal_espressif-3.7.0/components/hal/esp32s2/include/hal/ |
| D | rmt_ll.h | 46 * @brief Enable clock gate for register and memory
49 * @param enable True to enable, False to disable
51 static inline void rmt_ll_enable_periph_clock(rmt_dev_t *dev, bool enable) in rmt_ll_enable_periph_clock() argument
53 dev->apb_conf.clk_en = enable; // register clock gating in rmt_ll_enable_periph_clock()
54 dev->apb_conf.mem_clk_force_on = enable; // memory clock gating in rmt_ll_enable_periph_clock()
61 * @param enable True to power down, False to power up
63 static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable) in rmt_ll_power_down_mem() argument
65 dev->apb_conf.mem_force_pu = !enable; in rmt_ll_power_down_mem()
66 dev->apb_conf.mem_force_pd = enable; in rmt_ll_power_down_mem()
70 * @brief Enable APB accessing RMT memory in nonfifo mode
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| D | brownout_ll.h | 26 * @param enable true: power down flash. false: not power down
28 static inline void brownout_ll_enable_flash_power_down(bool enable) in brownout_ll_enable_flash_power_down() argument
30 RTCCNTL.brown_out.close_flash_ena = enable; in brownout_ll_enable_flash_power_down()
36 * @param enable true: power down. false: not power done.
38 static inline void brownout_ll_enable_rf_power_down(bool enable) in brownout_ll_enable_rf_power_down() argument
40 RTCCNTL.brown_out.pd_rf_ena = enable; in brownout_ll_enable_rf_power_down()
44 * @brief Enable this to reset brown out
48 * @param reset_ena true: enable reset. false: disable reset.
71 * @brief Set this bit to enable the brown out detection
73 * @param bod_enable true: enable, false: disable
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