Searched full:duplex (Results 1 – 25 of 110) sorted by relevance
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| /Zephyr-Core-3.5.0/include/zephyr/net/ |
| D | mii.h | 67 /** full duplex mode */
83 /** 100BASE-X full duplex capable */
85 /** 100BASE-X half duplex capable */
87 /** 10 Mb/s full duplex capable */
89 /** 10 Mb/s half duplex capable */
91 /** 100BASE-T2 full duplex capable */
93 /** 100BASE-T2 half duplex capable */
126 /** try for 100BASE-X full duplex support */
130 /** try for 10 Mb/s full duplex support */
132 /** try for 10 Mb/s half duplex support */
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| D | phy.h | 31 /** 10Base-T Half-Duplex */
33 /** 10Base-T Full-Duplex */
35 /** 100Base-T Half-Duplex */
37 /** 100Base-T Full-Duplex */
39 /** 1000Base-T Half-Duplex */
41 /** 1000Base-T Full-Duplex */
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| /Zephyr-Core-3.5.0/dts/bindings/ethernet/ |
| D | ethernet-phy.yaml | 23 - "10BASE-T Half-Duplex"
24 - "10BASE-T Full-Duplex"
25 - "100BASE-T Half-Duplex"
26 - "100BASE-T Full-Duplex"
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| D | ethernet,fixed-link.yaml | 15 full-duplex:
17 description: The fixed link operates in full duplex mode
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| D | microchip,enc28j60.yaml | 20 full-duplex:
23 Optional feature flag - Enables full duplex reception and transmission.
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| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | spi-device.yaml | 17 duplex:
21 Duplex mode, full or half. By default it's always full duplex thus 0
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| D | microchip,xec-qmspi-ldma.yaml | 39 QMSPI data lines 1, 2, or 4. 1 data line is full-duplex
40 MOSI and MISO or half-duplex on MOSI only. Lines set to 2
42 Defaults to 1 for full duplex driver's support for full-duplex spi.
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| D | espressif,esp32-spi.yaml | 17 half-duplex:
20 Enable half-duplex communication mode.
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| /Zephyr-Core-3.5.0/include/zephyr/dt-bindings/spi/ |
| D | spi.h | 17 * @name SPI duplex mode
20 * Some controllers support half duplex transfer, which results in 3-wire usage.
21 * By default, full duplex will prevail.
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| /Zephyr-Core-3.5.0/samples/boards/stm32/uart/single_wire/ |
| D | README.rst | 5 Use single-wire/half-duplex UART functionality of STM32 devices.
10 A simple application demonstrating how to use the single wire / half-duplex UART
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| /Zephyr-Core-3.5.0/drivers/ethernet/ |
| D | Kconfig.stm32_hal | 155 bool "Half duplex mode"
157 Set this if using half duplex when autonegotiation is disabled otherwise
158 duplex mode is full duplex
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| D | phy_xlnx_gem.c | 341 * bit [13] = Duplex changed interrupt enable, in phy_xlnx_gem_marvell_alaska_cfg()
364 * Set which link speeds and duplex modes shall be advertised during in phy_xlnx_gem_marvell_alaska_cfg()
412 /* Advertise 1 GBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
415 /* + 100 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
417 /* + 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
421 /* Advertise 100 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
424 /* + 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
428 /* Advertise 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
433 /* Advertise 1 GBit/s, half duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
436 /* + 100 MBit/s, half duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
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| D | eth_adin2111_priv.h | 148 /* SPI Header for writing control transaction in half duplex mode */
150 /* SPI Header for writing control transaction with MAC TX register (!) in half duplex mode */
152 /* SPI Header for reading control transaction in half duplex mode */
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| D | phy_cyclonev.c | 28 /* Speed and Duplex mask values */
250 *10Base-T full-duplex/100Base-T/100Base-T full-duplex in alt_eth_phy_config()
264 /* Set Advertise capabilities for 1000 Base-T/1000 Base-T full-duplex */ in alt_eth_phy_config()
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| /Zephyr-Core-3.5.0/dts/bindings/serial/ |
| D | espressif,esp32-uart.yaml | 20 Enable the hardware RS485 half duplex mode.
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| D | atmel,sam0-uart.yaml | 34 description: Enable collision detection for half-duplex mode.
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| /Zephyr-Core-3.5.0/boards/shields/mikroe_eth_click/ |
| D | mikroe_eth_click.overlay | 11 full-duplex;
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| /Zephyr-Core-3.5.0/samples/sensor/ds18b20/boards/ |
| D | nucleo_g0b1re.overlay | 12 * b) the UART TX pin only, while the single wire half-duplex mode is enabled.
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| /Zephyr-Core-3.5.0/dts/bindings/w1/ |
| D | zephyr,w1-serial.yaml | 7 # the option for a "single-wire Half-duplex" mode, where the TX and RX lines
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| /Zephyr-Core-3.5.0/dts/bindings/sensor/ |
| D | st,lis2mdl-common.yaml | 27 spi-full-duplex:
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| /Zephyr-Core-3.5.0/boards/shields/mikroe_eth_click/boards/ |
| D | lpcxpresso55s69_cpu0.overlay | 21 full-duplex;
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| D | lpcxpresso55s69_ns.overlay | 21 full-duplex;
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| /Zephyr-Core-3.5.0/dts/arm/xilinx/ |
| D | zynqmp.dtsi | 124 full-duplex;
151 full-duplex;
178 full-duplex;
205 full-duplex;
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| /Zephyr-Core-3.5.0/doc/connectivity/networking/api/ |
| D | ethernet.rst | 28 * Half/full duplex
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/ |
| D | Kconfig | 70 bool "SPI flash operates full-duplex with frequency (< 25 MHz)"
73 bool "SPI flash operates full-duplex with fast reading mode"
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