Searched full:consecutively (Results 1 – 8 of 8) sorted by relevance
17 Setting this value to N, will enable channels 0 to N-1, consecutively.
52 Setting this value to N, will enable channels 0 to N-1, consecutively.
71 * - the INTMUX output IRQ numbers are arranged consecutively in rv32m1_intmux_channel()
552 /* The values of this enum are consecutively numbered */567 /* The values of this enum are consecutively numbered */582 /* The values of this enum are consecutively numbered */604 /* The values of this enum are consecutively numbered */
67 "Two consecutively readings don't match"); in ZTEST()
153 /* Assure data are written to the latch buffer consecutively */ in flash_sam_write_page()
54 descriptors are small integers, consecutively assigned from zero, shared
49 /* Each GPIO pin 32-bit control register located consecutively in memory */
