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/Zephyr-latest/boards/nxp/usb_kw24d512/
DKconfig.defconfig10 # clock from the transceiver provided at the CLK_OUT output.
11 # CLK_OUT is internally connected to the input pin EXTAL0
/Zephyr-latest/drivers/ieee802154/
DKconfig.mcr20a19 reset and the CLK_OUT frequency is not set, instead these settings
23 prompt "CLK_OUT frequency"
Dieee802154_mcr20a.c61 /* Values for the clock output (CLK_OUT) configuration */
/Zephyr-latest/soc/nxp/kinetis/kwx/
Dsoc_kw2xd.c77 * for the PLL of the SoC. The clock output (CLK_OUT) is internally connected
79 * output of the transceiver at 4 MHz. The default frequency of the CLK_OUT
/Zephyr-latest/soc/altr/zephyr_nios2f/cpu/
Dghrd_10m50da.sopcinfo3062 <name>clk_out</name>