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/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/common/
Dvector.S32 * CLIC vectored mode
34 * CLIC vectored mode uses mtvec exclusively for exception handling and
39 addi t0, t0, 0x03 /* Enable CLIC vectored mode by setting LSB */
43 * CLIC vectored mode has a similar concept to CLINT vectored mode,
45 * However, in CLIC vectored mode, the handler table contains the
49 * When an interrupt occurs in CLIC vectored mode, the address of the
60 * CLINT vectored mode
64 * address of _irq_vector_table to indicate that vectored mode
72 addi t0, t0, 0x01 /* Enable vectored mode by setting LSB */
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
DKconfig.vim9 bool "TI Vectored Interrupt Manager"
13 The TI Vectored Interrupt Manager provides hardware assistance for prioritizing
Dintc_nuclei_eclic.c70 /** 0: non-vectored 1:vectored */
Dintc_dw.c11 * No support for vectored interrupts
/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/
DKconfig32 bool "Should the SOC use vectored mode"
35 Should the SOC use vectored mode.
/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/opentitan/
DKconfig.series8 # OpenTitan Ibex core mtvec mode is read-only / forced to vectored mode.
/Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/
Darm,v7m-nvic.yaml1 description: ARMv7-M NVIC (Nested Vectored Interrupt Controller)
Darm,v8m-nvic.yaml1 description: ARMv8-M NVIC (Nested Vectored Interrupt Controller)
Dti,vim.yaml7 TI Vectored Interrupt Manager is a external interrupt controller
Darm,v6m-nvic.yaml1 description: ARMv6-M NVIC (Nested Vectored Interrupt Controller) controller
Darm,v8.1m-nvic.yaml1 description: ARMv8.1-M NVIC (Nested Vectored Interrupt Controller)
/Zephyr-Core-3.5.0/boards/arm/bbc_microbit/doc/
Dindex.rst19 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
57 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/qemu_cortex_m0/doc/
Dindex.rst14 * Nested Vectored Interrupt Controller
31 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/nrf52_vbluno52/doc/
Dindex.rst14 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
43 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/qemu_cortex_m3/doc/
Dindex.rst13 * Nested Vectored Interrupt Controller
31 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/arch/arm/
DKconfig35 the ARM Nested Vectored Interrupt Controller (NVIC).
/Zephyr-Core-3.5.0/boards/arm/bcm958402m2_m7/doc/
Dindex.rst27 | NVIC | on-chip | nested vectored interrupt controller |
/Zephyr-Core-3.5.0/boards/arm/bcm958401m2/doc/
Dindex.rst27 | NVIC | on-chip | nested vectored interrupt controller |
/Zephyr-Core-3.5.0/boards/arm/arduino_due/doc/
Dindex.rst13 * Nested Vectored Interrupt Controller (NVIC)
40 | NVIC | on-chip | nested vectored |
72 A Cortex-M3/4-based board uses vectored exceptions. This means each exception
/Zephyr-Core-3.5.0/boards/arm/nrf52_adafruit_feather/doc/
Dindex.rst13 * :abbr:`NVIC (Nested Vectored Interrupt Controller)`
53 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/arch/arm/core/
DKconfig.vfp16 This option signifies the support for a Vectored Floating-Point (VFP)
/Zephyr-Core-3.5.0/boards/arm/bbc_microbit_v2/doc/
Dindex.rst51 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/nuvoton_pfm_m487/doc/
Dindex.rst46 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/nrf51_blenano/doc/
Dindex.rst27 | NVIC | on-chip | nested vectored |
/Zephyr-Core-3.5.0/boards/arm/numaker_pfm_m467/doc/
Dindex.rst45 | NVIC | on-chip | nested vectored |

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