Home
last modified time | relevance | path

Searched full:pwr (Results 1 – 25 of 64) sorted by relevance

123

/Zephyr-Core-3.5.0/dts/bindings/ieee802154/
Datmel,rf2xx.yaml57 tx-pwr-table:
63 for all transceivers. This property must be used with tx-pwr-min and
64 tx-pwr-max for normal operations. The number of elements is defined by
65 the size of the tx-pwr-table array property. The max entry value for
71 linear_step = (tx-pwr-max - tx-pwr-min)
72 / (sizeof(tx-pwr-table) - 1.0);
73 table_index = abs((value_in_dbm - tx-pwr-max) / linear_step);
74 output_power = tx-pwr-table[table_index];
77 tx-pwr-min = -17 dBm and tx-pwr-max = +4 dBm. Using 48 elements in the
78 tx-pwr-table array. The table array is filled from higher to lower power.
[all …]
/Zephyr-Core-3.5.0/boards/arm/thingy52_nrf52832/
Dthingy52_nrf52832.dts76 vdd_pwr: vdd-pwr-ctrl {
78 regulator-name = "vdd-pwr-ctrl";
84 spk_pwr: spk-pwr-ctrl {
86 regulator-name = "spk-pwr-ctrl";
90 mpu_pwr: mpu-pwr-ctrl {
92 regulator-name = "mpu-pwr-ctrl";
97 mic_pwr: mic-pwr-ctrl {
99 regulator-name = "mic-pwr-ctrl";
104 ccs_pwr: ccs-pwr-ctrl {
106 regulator-name = "ccs-pwr-ctrl";
/Zephyr-Core-3.5.0/samples/subsys/usb_c/sink/
DREADME.rst60 PWR 3A0
75 Unconstrained Pwr: 1
86 Unconstrained Pwr: 0
97 Unconstrained Pwr: 0
108 Unconstrained Pwr: 0
/Zephyr-Core-3.5.0/samples/drivers/led_apa102/boards/
Dblueclover_plt_demo_v2_nrf52832.overlay8 led_pwr: led-pwr-ctrl {
10 regulator-name = "led-pwr-ctrl";
/Zephyr-Core-3.5.0/boards/arm/stm32f3_seco_d23/
Dstm32f3_seco_d23.dts36 out_3p3v_pwr: 3p3v-out-pwr-ctrl {
38 regulator-name = "3p3v-out-pwr-ctrl";
45 out_gpio_bufa_pwr: out-gpio-bufa-pwr-ctrl {
47 regulator-name = "out-gpio-bufa-pwr-ctrl";
53 out_gpio_bufb_pwr: out-gpio-bufb-pwr-ctrl {
55 regulator-name = "out-gpio-bufb-pwr-ctrl";
61 in_gpio_buf_pwr: in-gpio-buf-pwr-ctrl {
63 regulator-name = "in-gpio-buf-pwr-ctrl";
/Zephyr-Core-3.5.0/dts/bindings/gpio/
Datmel-xplained-pro-header.yaml11 debugger connected should be called EXT7. PWR, EXT1, EXT2 and EXT3 are
14 * PWR is right angled at the top right hand side of the board. This
17 below the PWR header. This header must always be present.
22 All MCU boards have to implement at least PWR, EXT1, EXT2 (on medium and
/Zephyr-Core-3.5.0/boards/arm/lora_e5_dev_board/
Dlora_e5_dev_board.dts56 pwr_3v3: pwr-3v3-ctrl {
58 * PWR rail for SPI-flash, Temp-Sensor, RS-485 Transceiver,
63 regulator-name = "pwr-3v3-ctrl";
69 pwr_5v: pwr-5v-ctrl {
75 regulator-name = "pwr-5v-ctrl";
/Zephyr-Core-3.5.0/dts/bindings/spi/
Dst,stm32-spi-subghz.yaml19 Control the SUBGHZPI NSS line using the PWR HAL functions. This is for
/Zephyr-Core-3.5.0/dts/bindings/display/
Dultrachip,uc81xx-common.yaml63 pwr:
65 description: Power Setting (PWR) values
/Zephyr-Core-3.5.0/samples/subsys/usb_c/sink/src/
Dmain.c111 LOG_INF("\tUnconstrained Pwr: %d", in display_pdo()
241 LOG_INF("PWR 0A"); in port1_notify()
244 LOG_INF("PWR DEF"); in port1_notify()
247 LOG_INF("PWR 1A5"); in port1_notify()
250 LOG_INF("PWR 3A0"); in port1_notify()
/Zephyr-Core-3.5.0/dts/bindings/modem/
Dswir,hl7800.yaml22 mdm-pwr-on-gpios:
/Zephyr-Core-3.5.0/boards/shields/waveshare_epaper/
Dwaveshare_epaper_gdew042t2.overlay28 pwr = [03 00 26 26 09];
Dwaveshare_epaper_gdew075t7.overlay29 pwr = [07 07 3f 3f];
/Zephyr-Core-3.5.0/dts/bindings/sdhc/
Dzephyr,sdhc-spi-slot.yaml30 pwr-gpios:
Dnxp,imx-usdhc.yaml41 pwr-gpios:
/Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32wba/
Dsoc.c44 /* Enable PWR */ in stm32wba_init()
/Zephyr-Core-3.5.0/drivers/display/
Duc81xx.c43 struct uc81xx_dt_array pwr; member
247 LOG_HEXDUMP_DBG(p->pwr.data, p->pwr.len, "PWR"); in uc81xx_set_profile()
248 if (uc81xx_write_array_opt(dev, UC81XX_CMD_PWR, &p->pwr)) { in uc81xx_set_profile()
746 UC81XX_MAKE_ARRAY_OPT(n, pwr); \
755 .pwr = UC81XX_ASSIGN_ARRAY(n, pwr), \
/Zephyr-Core-3.5.0/boards/arm/atsamr21_xpro/
Datsamr21_xpro.dts166 tx-pwr-min = [01 11]; /* -17.0 dBm */
167 tx-pwr-max = [00 04]; /* 4.0 dBm */
168 tx-pwr-table = [00 01 03 04 05 05 06 06
/Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32u5/
Dsoc.c42 /* Enable PWR */ in stm32u5_init()
/Zephyr-Core-3.5.0/samples/bluetooth/hci_pwr_ctrl/
DREADME.rst1 .. _bluetooth-hci-pwr-ctrl-sample:
/Zephyr-Core-3.5.0/dts/bindings/mmc/
Dst,stm32-sdmmc.yaml27 pwr-gpios:
/Zephyr-Core-3.5.0/tests/drivers/build_all/modem/
Duart.dtsi13 mdm-pwr-on-gpios = <&test_gpio 0 0>;
/Zephyr-Core-3.5.0/drivers/ieee802154/
Dieee802154_cc2520.c732 uint8_t pwr; in cc2520_set_txpower() local
739 pwr = 0xF7; in cc2520_set_txpower()
742 pwr = 0xF2; in cc2520_set_txpower()
745 pwr = 0xAB; in cc2520_set_txpower()
748 pwr = 0x13; in cc2520_set_txpower()
751 pwr = 0x32; in cc2520_set_txpower()
754 pwr = 0x81; in cc2520_set_txpower()
757 pwr = 0x88; in cc2520_set_txpower()
760 pwr = 0x2C; in cc2520_set_txpower()
763 pwr = 0x03; in cc2520_set_txpower()
[all …]
/Zephyr-Core-3.5.0/boards/arm/particle_boron/
Dparticle_boron.dts27 en_buff_pwr: enable-buff-pwr {
/Zephyr-Core-3.5.0/boards/xtensa/m5stack_core2/
Dm5stack_core2.dts19 pwr-led = &pwr_led;
149 line-name = "pwr-led";

123