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/Zephyr-Core-3.5.0/boards/arm/xmc47_relax_kit/
Darduino_r3_connector.dtsi18 <6 0 &gpio2 15 0>, /* D0 */
19 <7 0 &gpio2 14 0>, /* D1 */
23 <11 0 &gpio2 12 0>, /* D5 */
24 <12 0 &gpio2 11 0>, /* D6 */
45 &gpio2 {
/Zephyr-Core-3.5.0/boards/arm/lpcxpresso11u68/
Dlpcxpresso11u68.dts50 gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
54 gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
58 gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
74 <6 0 &gpio2 11 0>, /* D0 */
75 <7 0 &gpio2 12 0>, /* D1 */
83 <15 0 &gpio2 3 0>, /* D9 */
127 &gpio2 {
/Zephyr-Core-3.5.0/dts/bindings/gpio/
Dxlnx,xps-gpio-1.00.a.yaml44 1 if controller has GPIO2 enabled, 0 otherwise
59 Default output value. If n-th bit is 1, GPIO2-n default value is 1.
61 xlnx,gpio2-width:
69 Default tristate register value. If n-th bit is 1, GPIO2-n is an input.
Dxlnx,xps-gpio-1.00.a-gpio2.yaml1 description: Xilinx AXI GPIO IP GPIO2 node
3 compatible: "xlnx,xps-gpio-1.00.a-gpio2"
Draspberrypi,pico-header.yaml14 2 GPIO2 3V3_EN -
Draspberrypi-40pins-header.yaml12 0 GPIO2/I2C1_SDA 5V -
/Zephyr-Core-3.5.0/boards/arm/vmu_rt1170/
Dvmu_rt1170.dts50 enable-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
59 enable-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
68 enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
98 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
108 enable-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
128 &gpio2 {
206 cs-gpios =<&gpio2 11 GPIO_ACTIVE_LOW>;
227 int-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
238 cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>,
239 <&gpio2 18 GPIO_ACTIVE_LOW>;
[all …]
/Zephyr-Core-3.5.0/boards/arm/mimxrt1015_evk/
Dmimxrt1015_evk.dts42 gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
60 <8 0 &gpio2 20 0>, /* D2 */
61 <9 0 &gpio2 26 0>, /* D3 */
63 <11 0 &gpio2 27 0>, /* D5 */
66 <14 0 &gpio2 21 0>, /* D8 */
67 <15 0 &gpio2 22 0>, /* D9 */
/Zephyr-Core-3.5.0/boards/riscv/mpfs_icicle/
Dmpfs_icicle.dts32 gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
40 gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
64 &gpio2 {
/Zephyr-Core-3.5.0/boards/arc/em_starterkit/
Dboard.dtsi84 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
90 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
96 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
102 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
/Zephyr-Core-3.5.0/samples/boards/esp32/deep_sleep/
DREADME.rst21 uses GPIO2 and GPIO4 to trigger a wake up with any one of the two pins are
37 However, when ``EXT1`` is also enabled, GPIO2 and GPIO4 should be pulled-down
65 sample below is for GPIO2.
73 Enabling EXT1 wakeup on pins GPIO2, GPIO4
DKconfig10 This option enables wake up from deep sleep from GPIO2 and
/Zephyr-Core-3.5.0/include/zephyr/devicetree/
Dspi.h37 * <&gpio2 20 GPIO_ACTIVE_LOW>;
62 * <&gpio2 20 GPIO_ACTIVE_LOW>;
89 * <&gpio2 20 GPIO_ACTIVE_LOW>;
126 * gpio2: gpio@... { ... };
131 * <&gpio2 20 GPIO_ACTIVE_LOW>;
145 * DT_SPI_DEV_CS_GPIOS_CTLR(DT_NODELABEL(b)) // DT_NODELABEL(gpio2)
165 * gpio2: gpio@... {
172 * <&gpio2 20 GPIO_ACTIVE_LOW>;
205 * <&gpio2 20 GPIO_ACTIVE_LOW>;
Dgpio.h34 * gpio2: gpio@... { };
38 * <&gpio2 30 GPIO_ACTIVE_HIGH>;
43 * DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(n), gpios, 1) // DT_NODELABEL(gpio2)
85 * gpio2: gpio@... {
91 * <&gpio2 30 GPIO_ACTIVE_HIGH>;
135 * gpio2: gpio@... {
142 * <&gpio2 30 GPIO_ACTIVE_HIGH>;
191 * gpio2: gpio@... {
198 * <&gpio2 30 GPIO_ACTIVE_HIGH>;
/Zephyr-Core-3.5.0/samples/basic/blinky_pwm/
DREADME.rst57 - connect GPIO2 to an LED
59 - connect GPIO2 to an LED
61 - connect GPIO2 to an LED
/Zephyr-Core-3.5.0/dts/bindings/sound/
Dcirrus,cs47l63.yaml29 gpio2-gpios:
32 GPIO2 input with bus-keeper
/Zephyr-Core-3.5.0/samples/boards/esp32/deep_sleep/boards/
Desp32_devkitc_wroom.conf1 # Enables GPIO2 and GPIO4 as wakeup sources
Desp32s2_saola.conf1 # Enables GPIO2 and GPIO4 as wakeup sources
Dyd_esp32.conf1 # Enables GPIO2 and GPIO4 as wakeup sources
/Zephyr-Core-3.5.0/boards/arm/arty/dts/
Darty_a7_arm_designstart.dtsi216 xlnx,gpio2-width = <0x4>;
221 gpio0_2: gpio2 {
222 compatible = "xlnx,xps-gpio-1.00.a-gpio2";
242 xlnx,gpio2-width = <0x4>;
247 gpio1_2: gpio2 {
248 compatible = "xlnx,xps-gpio-1.00.a-gpio2";
/Zephyr-Core-3.5.0/boards/arm/colibri_imx7d_m4/
Dcolibri_imx7d_m4.dts40 gpios = <&gpio2 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
59 &gpio2 {
/Zephyr-Core-3.5.0/boards/arm/mimxrt1062_fmurt6/
Dmimxrt1062_fmurt6.dts43 gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
47 gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
143 &gpio2 {
331 cs-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>,
332 <&gpio2 26 GPIO_ACTIVE_LOW>;
408 cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
/Zephyr-Core-3.5.0/dts/bindings/modem/
Dswir,hl7800.yaml42 mdm-gpio2-gpios:
/Zephyr-Core-3.5.0/boards/riscv/icev_wireless/
Dicev_wireless-pinctrl.dtsi39 /* Note: external 10k pull-ups on GPIO2 and GPIO8 */
/Zephyr-Core-3.5.0/boards/arm/qemu_cortex_m3/
Dqemu_cortex_m3.dts55 &gpio2 {

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