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/Zephyr-Core-3.7.0/samples/drivers/spi_flash/boards/
Dstm32h573i_dk.overlay8 /* request 57 for XSPI1 */
9 dmas = <&gpdma1 4 57 STM32_DMA_PERIPH_TX
10 &gpdma1 5 57 STM32_DMA_PERIPH_RX>;
/Zephyr-Core-3.7.0/soc/st/stm32/stm32l1x/
DKconfig.defconfig.stm32l152xc10 default 57
DKconfig.defconfig.stm32l152xe10 default 57
DKconfig.defconfig.stm32l151xc10 default 57
/Zephyr-Core-3.7.0/samples/sensor/max30101/boards/
Dhexiwear_mk64f12.overlay8 max30101@57 {
/Zephyr-Core-3.7.0/tests/drivers/eeprom/api/
Dat2x_emul.overlay12 i2c_eeprom: eeprom@57 {
/Zephyr-Core-3.7.0/boards/shields/st_b_lcd40_dsi1_mb1166/
Dst_b_lcd40_dsi1_mb1166.overlay14 reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>;
Dst_b_lcd40_dsi1_mb1166_a09.overlay14 reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>;
/Zephyr-Core-3.7.0/dts/arm/st/g4/
Dstm32g431.dtsi19 interrupts = <56 0 57 0 58 0 59 0 60 0 97 0>;
/Zephyr-Core-3.7.0/dts/arm/ti/
Dcc1352r.dtsi25 ti_ccfg_partition: partition@57fa8 {
/Zephyr-Core-3.7.0/dts/bindings/pinctrl/
Dti,cc32xx-pinctrl.yaml37 /* configure pin 57 as UART0 RX and pin 62 as UART0 RTS */
39 /* both pin 57 and 62 have pull-up enabled */
/Zephyr-Core-3.7.0/drivers/dai/intel/alh/
Dalh_map.h73 54, /* 57 - BIDIRECTIONAL */
76 57, /* 60 - BIDIRECTIONAL */
/Zephyr-Core-3.7.0/samples/drivers/lora/receive/
DREADME.rst41 [00:00:02.249,000] <inf> lora_receive: Received data: helloworld (RSSI:-57dBm, SNR:9dBm)
42 [00:00:03.541,000] <inf> lora_receive: Received data: helloworld (RSSI:-57dBm, SNR:9dBm)
/Zephyr-Core-3.7.0/dts/arm/st/f1/
Dstm32f107.dtsi18 interrupts = <56 0 57 0 58 0 59 0 60 0>;
/Zephyr-Core-3.7.0/dts/arm/st/f3/
Dstm32f373Xc.dtsi26 interrupts = <56 0 57 0 58 0 59 0 60 0>;
Dstm32f303Xb.dtsi33 interrupts = <56 0 57 0 58 0 59 0 60 0>;
Dstm32f303Xe.dtsi33 interrupts = <56 0 57 0 58 0 59 0 60 0>;
Dstm32f302Xc.dtsi27 interrupts = <56 0 57 0 58 0 59 0 60 0>;
/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/pinctrl/
Dti-cc32xx-pinctrl.h176 #define GPIO2_P57 TI_CC32XX_PINMUX(57U, 0U)
177 #define UART0_RX_P57 TI_CC32XX_PINMUX(57U, 3U)
178 #define UART1_RX_P57 TI_CC32XX_PINMUX(57U, 6U)
179 #define GT_CCP02_P57 TI_CC32XX_PINMUX(57U, 7U)
/Zephyr-Core-3.7.0/boards/shields/lmp90100_evb/
Dlmp90100_evb.overlay34 eeprom0_lmp90100_evb: eeprom@57 {
/Zephyr-Core-3.7.0/samples/subsys/nvs/
Dsample.yaml22 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 \
/Zephyr-Core-3.7.0/dts/bindings/gpio/
Dadi,sdp-120.yaml67 57 RESET_OUT_N SLEEP_N 64
Dst,dsi-lcd-qsh-030.yaml37 57 RESET - (58)
/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/interrupt-controller/
Desp-esp32c3-intmux.h67 #define CORE0_DRAM0_PMS_INTR_SOURCE 57
/Zephyr-Core-3.7.0/dts/arm/st/g0/
Dstm32g071.dtsi34 dma-requests= <57>;

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