| /Zephyr-Core-3.5.0/soc/nios2/nios2f-zephyr/cpu/ |
| D | ghrd_10m50da_top.v | 3 input wire clk_50,
4 //input wire clk_ddr3_100_p,
5 input wire fpga_reset_n,
7 output wire qspi_clk,
8 inout wire[3:0] qspi_io,
9 output wire qspi_csn,
11 //output wire [13:0] mem_a,
12 //output wire [2:0] mem_ba,
13 //inout wire [0:0] mem_ck,
14 //inout wire [0:0] mem_ck_n,
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| /Zephyr-Core-3.5.0/dts/bindings/sensor/ |
| D | maxim,max31865.yaml | 1 # Copyright (c) 2022, HAW Hamburg FTZ-DIWIP
2 # SPDX-License-Identifier: Apache-2.0
6 Maxim MAX31865 SPI RTD-to-Digital Converter Temperature Sensor.
12 include: [sensor-device.yaml, spi-device.yaml]
15 resistance-at-zero:
20 resistance-reference:
26 low-threshold:
29 description: Low fault threshold (ADC CODE, 15-bit value, unit-free, default value is the
32 high-threshold:
35 description: High fault threshold (ADC CODE, 15-bit value, unit-free, default value is the
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| /Zephyr-Core-3.5.0/doc/hardware/peripherals/ |
| D | w1.rst | 3 1-Wire Bus
9 1-Wire is a low speed half-duplex serial bus using only a single wire plus
11 Similarly to I2C, 1-Wire uses a bidirectional open-collector data line,
14 The 1-Wire bus supports longer bus lines than I2C, while it reaches speeds of up
17 over a bus length of 100 meters. Using overdrive speed, 3 nodes on a bus of
23 .. figure:: 1-Wire_bus_topology.drawio.svg
25 :alt: 1-Wire bus topology
27 A typical 1-Wire bus topology
30 .. _w1-master-api:
35 Zephyr's 1-Wire Master API is used to interact with 1-Wire slave devices like
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| D | 1-Wire_bus_topology.drawio.svg | 1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- Do not edit this file with editors other than diagrams.net -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-0.5 -0.5 521 171" content="<mxfile host="Electron" modified="2022-07-04T19:35:4…
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| /Zephyr-Core-3.5.0/drivers/w1/ |
| D | w1_shell.c | 5 * SPDX-License-Identifier: Apache-2.0
17 #define W1DEV_X_NOT_FOUND "1-Wire device not found: \"%s\""
19 #define OPTION_HELP_RESET "-r Perform bus reset before executing cmd."
31 if (arg[0] != '-') { in read_io_options()
42 return -EINVAL; in read_io_options()
49 /* 1-Wire reset bus <device> */
58 return -EINVAL; in cmd_w1_reset_bus()
71 /* 1-Wire read_bit <device> */
80 return -EINVAL; in cmd_w1_read_bit()
95 /* 1-Wire read_byte <device> */
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| D | w1_ds2477_85_common.h | 4 * SPDX-License-Identifier: Apache-2.0
24 /* 1-Wire specific commands */
44 #define CMD_WR_W1_PORT_CFG_LEN 3U
45 /* 1-Wire specific commands */
101 /* upper limit of 1-wire command length supported(in bytes) */
103 /* limit of 1-wire command len is 126 bytes, but currently not used: */
111 /* default 1-wire timing parameters (cfg. value==6) */
140 /* defines for DTS switching-th, active-pull-th and weak-pullup enums */
148 #define RPUP_BUF_SW_TH_OFF RPUP_BUF_SW_TH_PREP(3)
149 #define RPUP_BUF_APULL_TH_Msk GENMASK(3, 2)
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| /Zephyr-Core-3.5.0/samples/drivers/led_xec/ |
| D | README.rst | 1 .. zephyr:code-sample:: led-xec
2 :name: Breathing-blinking LED (BBLED)
3 :relevant-api: led_interface
5 Control a BBLED (Breathing-Blinking LED) using Microchip XEC driver.
10 This sample allows to test the Microchip led-xec driver which uses the
11 breathing-blinking LED (BBLED) controllers. The SoC design is fixed
16 - BBLED controller 0 uses GPIO 0156.
17 - BBLED controller 1 uses GPIO 0157.
18 - BBLED controller 2 uses GPIO 0153.
22 - BBLED controller 3 uses GPIO 0035
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| /Zephyr-Core-3.5.0/samples/drivers/w1/scanner/ |
| D | README.rst | 1 .. zephyr:code-sample:: w1-scanner
2 :name: 1-Wire scanner
3 :relevant-api: w1_interface
5 Scan for 1-Wire devices and print their family ID and serial number.
10 This sample demonstrates how to scan for 1-Wire devices. It runs the 1-Wire
20 .. zephyr-app-commands::
21 :zephyr-app: samples/drivers/w1/scanner
23 :gen-args: -DDTC_OVERLAY_FILE=w1_serial.overlay
30 .. code-block:: console
35 [00:00:00.656,097] <inf> main: Number of devices found on bus: 3
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| /Zephyr-Core-3.5.0/subsys/bluetooth/controller/coex/ |
| D | readme.rst | 2 Bluetooth co-existence drivers
5 Co-existence Ticker
8 …cker.c` is designed to utilize co-existence with another transmitter. Chips such as nordic nRF9160…
10 Nordic connect SDK provides detailed description of the 1-wire and 3-wire co-existence interface fo…
12 Similarly, as in the nordic implementation of the 1-wire interface, the coexistence ticker utilizes…
14 .. code-block:: DTS
17 compatible = "gpio-radio-coex";
18 grant-gpios = <&gpio0 0 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
19 grant-delay-us = <150>;
22 Whenever the grant pin transitions into non-active (such as 1 for the nRF9160). state the implement…
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| /Zephyr-Core-3.5.0/samples/drivers/espi/ |
| D | README.rst | 1 .. zephyr:code-sample:: espi
3 :relevant-api: espi_interface spi_interface
5 Use eSPI to connect to a slave device and exchange virtual wire packets.
13 a simple eSPI handshake that includes exchanging virtual wire packets.
15 Standard platform signals are sent virtual wire packets over the bus.
17 eSPI events and when a virtual wire is received.
27 boards's map-file next fixture settings::
29 - fixture: espi_device_connect
34 .. code-block:: console
37 eSPI test - I/O initialization...complete
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/ |
| D | Kconfig.soc | 4 # SPDX-License-Identifier: Apache-2.0
28 Allowed divider values: 1, 3, 4, 16, and 48.
42 or other non-JTAG alternate functions.
45 bool "Debug support via Serial wire debug"
47 JTAG port in SWD mode. I2C09 and ADC00-03 can be used.
50 bool "Debug support via Serial wire debug with tracing enabled"
53 to see if ADC00-03 can be used or not.
64 bool "Debug support via Serial wire debug"
67 I2C09 can be used, but ADC00-03 cannot.
70 bool "debug support via Serial Wire Debug and Viewer"
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| /Zephyr-Core-3.5.0/dts/bindings/espi/ |
| D | microchip,xec-espi-vw-routing.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Microchip XEC eSPI Virtual Wire routing
6 compatible: "microchip,xec-espi-vw-routing"
10 child-binding:
12 Child node containing the routing of an eSPI virtual wire to the SoC
15 vw-reg:
20 vw-girq:
26 to GIRQ24 b[5]. vw-girq = <24 5>;
28 reset-state:
31 Optional default virtual wire state on reset (0 or 1).
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/ |
| D | Kconfig.soc | 4 # SPDX-License-Identifier: Apache-2.0
27 Allowed divider values: 1, 3, 4, 16, and 48.
54 or other non-JTAG alternate functions.
57 bool "Debug support via Serial wire debug"
59 JTAG port in SWD mode. UART2 and ADC00-03 can be used.
62 bool "Debug support via Serial wire debug with tracing enabled"
65 to see if ADC00-03 can be used or not.
77 bool "Debug support via Serial wire debug"
80 UART2 can be used, but ADC00-03 cannot.
83 bool "debug support via Serial Wire Debug and Viewer"
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/common/ |
| D | soc_dt.h | 4 * SPDX-License-Identifier: Apache-2.0
40 /* Macro to store eSPI virtual wire DT flags
43 * b[3:2] = default virtual wire state 0(HW default), 1(low), 2(high)
44 * b[6:4] = virtual wire state reset event:
45 * 0(HW default), 1(ESPI_RESET), 2(RESET_SYS), 3(RESET_SIO), 4(PLTRST)
60 .bit = DT_PROP_BY_IDX(MCHP_DT_NODE_FROM_VWTABLE(vw), vw_reg, 3), \
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| /Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/npcx4/ |
| D | npcx4-espi-vws-map.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Common eSPI Virtual Wire (VW) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-espi-vws-map.dtsi>
11 * Specific eSPI Virtual Wire (VW) mapping configurations in npcx4 series
12 * |--------------------------------------------------------------------------|
13 * | VW idx | SLV reg | Wire Bit 3 | Wire Bit 2 | Wire Bit 1| Wire Bit 0 |
14 * |--------------------------------------------------------------------------|
15 * | Output (Slave-to-Master) Virtual Wires (High at reset state) |
16 * |--------------------------------------------------------------------------|
19 * |--------------------------------------------------------------------------|
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| /Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/npcx9/ |
| D | npcx9-espi-vws-map.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Common eSPI Virtual Wire (VW) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-espi-vws-map.dtsi>
11 * Specific eSPI Virtual Wire (VW) mapping configurations in npcx9 series
12 * |--------------------------------------------------------------------------|
13 * | VW idx | SLV reg | Wire Bit 3 | Wire Bit 2 | Wire Bit 1| Wire Bit 0 |
14 * |--------------------------------------------------------------------------|
15 * | Output (Slave-to-Master) Virtual Wires (High at reset state) |
16 * |--------------------------------------------------------------------------|
19 * |--------------------------------------------------------------------------|
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| /Zephyr-Core-3.5.0/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/ |
| D | radio_nrf5_ppi_resources.h | 4 * SPDX-License-Identifier: Apache-2.0
9 /* PPI channel 20 is pre-programmed with the following fixed settings:
10 * EEP: TIMER0->EVENTS_COMPARE[0]
11 * TEP: RADIO->TASKS_TXEN
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
15 * EEP: TIMER0->EVENTS_COMPARE[0]
16 * TEP: RADIO->TASKS_RXEN
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
21 * EEP: RADIO->EVENTS_ADDRESS
22 * TEP: TIMER0->TASKS_CAPTURE[1]
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| D | radio_nrf5_dppi_resources.h | 4 * SPDX-License-Identifier: Apache-2.0
10 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
17 * wire the RADIO EVENTS_ADDRESS event to the
24 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event
31 * wire the RADIO EVENTS_END event to the
38 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task.
44 * wire the RADIO EVENTS_READY event to the
51 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task.
60 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task.
78 #define HAL_ENABLE_FEM_PPI 3
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| D | radio_nrf5_ppi.h | 2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
20 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
22 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
29 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
48 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
49 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
52 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
57 (uint32_t)&(NRF_PPI->TASKS_CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX].DIS)); in hal_radio_enable_on_tick_ppi_config_and_enable()
65 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
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| /Zephyr-Core-3.5.0/samples/shields/lmp90100_evb/rtd/ |
| D | README.rst | 12 with a 3-wire PT100 sensor.
21 connected to the development board according to Example #3 ("3-wire
32 .. zephyr-app-commands::
33 :zephyr-app: samples/shields/lmp90100_evb/rtd
41 .. code-block:: console
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| /Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/reg/ |
| D | mec172x_espi_vw.h | 4 * SPDX-License-Identifier: Apache-2.0
13 /* Master to Slave VW register: 96-bit (3 32 bit registers) */
14 /* 32-bit word 0 (bits[31:0]) */
28 /* 32-bit word 1 (bits[63:32]) */
43 /* 32-bit word 2 (bits[95:64]) */
77 /* Slave to Master VW register: 64-bit (2 32 bit registers) */
78 /* 32-bit word 0 (bits[31:0]) */
111 /* 32-bit word 1 (bits[63:32]) */
122 #define ESPI_S2MW1_SRC_POS(n) SHLU32((n), 3)
138 * GIRQ24 contains MSVW 0 - 6
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| /Zephyr-Core-3.5.0/drivers/espi/ |
| D | espi_npcx.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/espi/npcx_espi.h>
31 /* mapping table between eSPI reset signal and wake-up input */
52 ((struct espi_reg *)((const struct espi_npcx_config *)(dev)->config)->base)
58 #define NPCX_ESPI_CH_FLASH 3
66 #define NPCX_ESPI_MAXFREQ_50 3
68 /* Minimum delay before acknowledging a virtual wire */
106 /* eSPI Virtual Wire Input (Master-to-Slave) signals configuration structure */
108 enum espi_vwire_signal sig; /* Virtual Wire signal */
110 uint8_t bitmask; /* VW signal bits-mask */
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| /Zephyr-Core-3.5.0/doc/connectivity/bluetooth/ |
| D | overview.rst | 1 .. _bluetooth-overview:
15 grown to be mature and feature-rich, as can be seen in the section below.
20 Zephyr comes integrated with a feature-rich and highly configurable
23 * Bluetooth v5.3 compliant
34 * Controller-only (HCI) over UART, SPI, USB and IPC physical transports
35 * Host-only over UART, SPI, and IPC (shared memory)
38 * Bluetooth-SIG qualified
46 * All v5.3 specification features supported (except a few minor items)
47 * Concurrent multi-protocol support ready
52 real-time specifics so that they can be encapsulated in a hardware-specific
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| /Zephyr-Core-3.5.0/drivers/led_strip/ |
| D | Kconfig | 1 # Top-level configuration file for LED strip drivers.
5 # SPDX-License-Identifier: Apache-2.0
8 bool "Light-Emitting Diode (LED) strip drivers"
15 module-str = LED strip
25 # for drivers which require 4 B on wire for every 3 B of color, e.g. APA102, but
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| /Zephyr-Core-3.5.0/soc/arm/silabs_exx32/efr32bg13p/ |
| D | soc_pinmap.h | 3 * SPDX-License-Identifier: Apache-2.0
21 /* Serial Wire Output (SWO) */
28 #elif (SWO_LOCATION == 3)
|
