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/Zephyr-latest/samples/modules/cmsis_dsp/moving_average/
Dsample.yaml34 - "Input\\[17\\]: 8 9 10 11 12 13 14 15 16 17 | Output\\[17\\]: 12.50"
35 - "Input\\[18\\]: 9 10 11 12 13 14 15 16 17 18 | Output\\[18\\]: 13.50"
36 - "Input\\[19\\]: 10 11 12 13 14 15 16 17 18 19 | Output\\[19\\]: 14.50"
37 - "Input\\[20\\]: 11 12 13 14 15 16 17 18 19 20 | Output\\[20\\]: 15.50"
38 - "Input\\[21\\]: 12 13 14 15 16 17 18 19 20 21 | Output\\[21\\]: 16.50"
39 - "Input\\[22\\]: 13 14 15 16 17 18 19 20 21 22 | Output\\[22\\]: 17.50"
40 - "Input\\[23\\]: 14 15 16 17 18 19 20 21 22 23 | Output\\[23\\]: 18.50"
41 - "Input\\[24\\]: 15 16 17 18 19 20 21 22 23 24 | Output\\[24\\]: 19.50"
42 - "Input\\[25\\]: 16 17 18 19 20 21 22 23 24 25 | Output\\[25\\]: 20.50"
43 - "Input\\[26\\]: 17 18 19 20 21 22 23 24 25 26 | Output\\[26\\]: 21.50"
/Zephyr-latest/tests/lib/cmsis_dsp/filtering/src/
Dmisc_q15.c53 DEFINE_CORRELATE_TEST(14, 17);
58 DEFINE_CORRELATE_TEST(15, 17);
63 DEFINE_CORRELATE_TEST(16, 17);
66 DEFINE_CORRELATE_TEST(17, 15);
67 DEFINE_CORRELATE_TEST(17, 16);
68 DEFINE_CORRELATE_TEST(17, 17);
69 DEFINE_CORRELATE_TEST(17, 18);
70 DEFINE_CORRELATE_TEST(17, 33);
73 DEFINE_CORRELATE_TEST(32, 17);
110 DEFINE_CONV_TEST(14, 17);
[all …]
/Zephyr-latest/boards/shields/waveshare_epaper/
Dwaveshare_epaper_gdew075t7.overlay31 softstart = [17 17 17 17];
Dwaveshare_epaper_gdew042t2.overlay30 softstart = [17 17 17];
Dwaveshare_epaper_gdew042t2-p.overlay35 softstart = [ 17 17 17 ];
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-r8a77951.h46 #define PIN_A17 RCAR_GP_PIN(1, 17)
106 #define PIN_SD3_DS RCAR_GP_PIN(4, 17)
124 #define PIN_MSIOF0_SCK RCAR_GP_PIN(5, 17)
150 #define PIN_SSI_SCK78 RCAR_GP_PIN(6, 17)
185 #define PIN_DU_DOTCLKIN1 RCAR_NOGP_PIN(17)
867 #define FUNC_AUDIO_CLKA_A IPSR(17, 0, 0)
868 #define FUNC_AUDIO_CLKB_B IPSR(17, 4, 0)
869 #define FUNC_SCIF_CLK_A IPSR(17, 4, 1)
870 #define FUNC_STP_IVCXO27_1_D IPSR(17, 4, 6)
871 #define FUNC_REMOCON_A IPSR(17, 4, 7)
[all …]
Dpinctrl-r8a77961.h47 #define PIN_A17 RCAR_GP_PIN(1, 17)
107 #define PIN_SD3_DS RCAR_GP_PIN(4, 17)
125 #define PIN_MSIOF0_SCK RCAR_GP_PIN(5, 17)
151 #define PIN_SSI_SCK78 RCAR_GP_PIN(6, 17)
186 #define PIN_DU_DOTCLKIN1 RCAR_NOGP_PIN(17)
863 #define FUNC_AUDIO_CLKA_A IPSR(17, 0, 0)
864 #define FUNC_AUDIO_CLKB_B IPSR(17, 4, 0)
865 #define FUNC_SCIF_CLK_A IPSR(17, 4, 1)
866 #define FUNC_STP_IVCXO27_1_D IPSR(17, 4, 6)
867 #define FUNC_REMOCON_A IPSR(17, 4, 7)
[all …]
/Zephyr-latest/tests/subsys/display/cfb/basic/src/
Dprint_rectspace1016.c104 zassert_ok(cfb_print(dev, " ", 11, 17)); in ZTEST()
107 zassert_true(verify_image_and_bg(11, 17, rectspace1016, 10, 16, 0)); in ZTEST()
152 zassert_ok(cfb_print(dev, " ", 11, 17)); in ZTEST()
155 zassert_true(verify_image_and_bg(11, 17, kerning_3_2rectspace1016, 23, 16, 0)); in ZTEST()
161 zassert_ok(cfb_print(dev, " ", display_width - 23, 17)); in ZTEST()
164 zassert_true(verify_image(display_width - 23, 17, kerning_3_2rectspace1016, 23, 16)); in ZTEST()
170 zassert_ok(cfb_print(dev, " ", display_width - 22, 17)); in ZTEST()
173 zassert_true(verify_image(display_width - 22, 17, rectspace1016, 10, 16)); in ZTEST()
212 zassert_ok(cfb_print(dev, " ", 160, 17)); in ZTEST()
215 zassert_true(verify_image(160, 17, kerning_3_12rectspace1016, 153, 16)); in ZTEST()
Ddraw_text_rectspace1016.c104 zassert_ok(cfb_draw_text(dev, " ", 11, 17)); in ZTEST()
107 zassert_true(verify_image_and_bg(11, 17, rectspace1016, 10, 16, 0)); in ZTEST()
152 zassert_ok(cfb_draw_text(dev, " ", 11, 17)); in ZTEST()
155 zassert_true(verify_image_and_bg(11, 17, kerning_3_2rectspace1016, 23, 16, 0)); in ZTEST()
161 zassert_ok(cfb_draw_text(dev, " ", display_width - 23, 17)); in ZTEST()
164 zassert_true(verify_image(display_width - 23, 17, kerning_3_2rectspace1016, 23, 16)); in ZTEST()
170 zassert_ok(cfb_draw_text(dev, " ", display_width - 22, 17)); in ZTEST()
174 verify_image(display_width - 22, 17, kerning_3_rightclip_1_2rectspace1016, 22, 16)); in ZTEST()
/Zephyr-latest/dts/arm/microchip/
Dmec172x_common.dtsi30 direct-capable-girqs = <13 14 15 16 17 18 19 20 21 23>;
44 16 17 18 21 22 24 25
55 16 17 18 19 20 21 22 23
66 16 17 18 19 20 21 22 23
77 16 17 18 19 20 21 22 23
88 16 17 18 19 20 21 22 23
116 16 17 18 19 20 22>;
133 16 17 20 21 22 23>;
184 sources = <0 1 2 3 4 5 6 7 8 9 10 16 17>;
193 12 13 14 15 16 17 18 19
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dite,it8xxx2-pinctrl-func.yaml42 If KSO[17:0] is in KBS mode, setting 1 selects open-drain mode,
50 pull-up (KSO[17:16] setting internal pull-up by GPIO port GPCR register).
57 (include KSO[17:16]), otherwise setting pin configure to keyboard scan
Dsifive,pinctrl.yaml15 For example, setting pins 16 and 17 both to IOF0 would look like this:
24 pinmux = <17 SIFIVE_PINMUX_IOF0>;
/Zephyr-latest/dts/arm/ene/
Dkb1200.dtsi252 interrupts = <17 1>;
261 interrupts = <17 1>;
270 interrupts = <17 1>;
279 interrupts = <17 1>;
288 interrupts = <17 1>;
297 interrupts = <17 1>;
306 interrupts = <17 1>;
315 interrupts = <17 1>;
324 interrupts = <17 1>;
333 interrupts = <17 1>;
/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32f3x0.h36 #define GD32_RESET_TIMER15 GD32_RESET_CONFIG(APB2RST, 17U)
46 #define GD32_RESET_USART1 GD32_RESET_CONFIG(APB1RST, 17U)
53 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(AHBRST, 17U)
/Zephyr-latest/boards/nordic/nrf9160dk/dts/nrf9160/
Dnrf9160dk_uart1_on_if0_3.dtsi11 <NRF_PSEL(UART_RX, 0, 17)>,
20 <NRF_PSEL(UART_RX, 0, 17)>,
/Zephyr-latest/samples/userspace/shared_mem/src/
Dmain.h54 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}
56 17, 18, 19, 20, 21, 22, 23, 24, 25, 5, 0, 4, 1, 3, 2}
58 15, 14, 17, 16, 19, 18, 21, 20, 23, 22, 25, 24}
/Zephyr-latest/tests/subsys/dsp/basicmath/src/
Dq15.c19 #define ABS_ERROR_THRESH_Q63 ((q63_t)(1 << 17))
51 17);
53 17);
87 ref_add_possat, 17);
89 ref_add_negsat, 17);
123 17);
125 17);
159 ref_sub_possat, 17);
161 ref_sub_negsat, 17);
195 17);
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Desp32c3-pinctrl.h47 #define I2C0_SCL_GPIO17 ESP32_PINMUX(17, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
92 #define I2C0_SDA_GPIO17 ESP32_PINMUX(17, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
137 #define I2S_I_BCK_GPIO17 ESP32_PINMUX(17, ESP_I2SI_BCK_IN, ESP_I2SI_BCK_OUT)
182 #define I2S_I_SD_GPIO17 ESP32_PINMUX(17, ESP_I2SI_SD_IN, ESP_NOSIG)
227 #define I2S_I_WS_GPIO17 ESP32_PINMUX(17, ESP_I2SI_WS_IN, ESP_I2SI_WS_OUT)
272 #define I2S_MCLK_GPIO17 ESP32_PINMUX(17, ESP_I2S_MCLK_IN, ESP_I2S_MCLK_OUT)
317 #define I2S_O_BCK_GPIO17 ESP32_PINMUX(17, ESP_I2SO_BCK_IN, ESP_I2SO_BCK_OUT)
362 #define I2S_O_SD_GPIO17 ESP32_PINMUX(17, ESP_NOSIG, ESP_I2SO_SD_OUT)
407 #define I2S_O_WS_GPIO17 ESP32_PINMUX(17, ESP_I2SO_WS_IN, ESP_I2SO_WS_OUT)
452 #define LEDC_CH0_GPIO17 ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
[all …]
/Zephyr-latest/samples/drivers/rtc/
DREADME.rst30 RTC date and time: 2024-11-17 04:19:00
31 RTC date and time: 2024-11-17 04:19:01
/Zephyr-latest/boards/nordic/nrf9160dk/dts/nrf52840/
Dnrf9160dk_uart1_on_if0_3.dtsi18 psels = <NRF_PSEL(UART_TX, 0, 17)>,
27 psels = <NRF_PSEL(UART_TX, 0, 17)>,
/Zephyr-latest/boards/ebyte/e73_tbb/
Debyte_e73_tbb_nrf52832-pinctrl.dtsi28 psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
35 psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
/Zephyr-latest/subsys/net/lib/lwm2m/
Ducifi_lpwan.h11 #define MAC_ADDRESS_SIZE 17 /* 16 hex digits, eg. "01a2b3c4d5e6f708\0" */
31 #define UCIFI_LPWAN_NUMBER_REPEATS_RID 17
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dgd32f3x0-clocks.h35 #define GD32_CLOCK_GPIOA GD32_CLOCK_CONFIG(AHBEN, 17U)
49 #define GD32_CLOCK_USART1 GD32_CLOCK_CONFIG(APB1EN, 17U)
63 #define GD32_CLOCK_TIMER15 GD32_CLOCK_CONFIG(APB2EN, 17U)
/Zephyr-latest/soc/intel/apollo_lake/
Dsoc_gpio.h40 #define APL_GPIO_17 17
74 #define APL_GPIO_49 17
124 #define APL_GPIO_204 17
158 #define APL_GPIO_89 17
207 #define APL_GPIO_147 17
258 #define APL_GPIO_169 17
/Zephyr-latest/tests/drivers/flash/common/boards/
Dnrf52840dk_mx25r_high_perf.overlay10 cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
16 jedec-id = [c2 28 17];

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