1/* Copyright (C) 2023 BeagleBoard.org Foundation
2 * Copyright (C) 2023 S Prashanth
3 * Copyright (c) 2024 Texas Instruments Incorporated
4 *	Andrew Davis <afd@ti.com>
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9#include <mem.h>
10#include <freq.h>
11#include <arm/armv7-r.dtsi>
12#include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
13
14/ {
15	#address-cells = <1>;
16	#size-cells = <1>;
17
18	cpus {
19		#address-cells = <1>;
20		#size-cells = <0>;
21
22		cpu0: cpu@0 {
23			device_type = "cpu";
24			compatible = "arm,cortex-r5";
25			reg = <0>;
26		};
27	};
28
29	atcm: memory@0 {
30		device_type = "memory";
31		compatible = "zephyr,memory-region", "mmio-sram";
32		reg = <0x00000000 DT_SIZE_K(32)>;
33		zephyr,memory-region = "ATCM";
34	};
35
36	btcm: memory@41010000 {
37		device_type = "memory";
38		compatible = "zephyr,memory-region", "mmio-sram";
39		reg = <0x41010000 DT_SIZE_K(32)>;
40		zephyr,memory-region = "BTCM";
41	};
42
43	vim: interrupt-controller@ff80000 {
44		#address-cells = <1>;
45		compatible = "ti,vim";
46		reg = <0x0ff80000 0x2800>;
47		interrupt-controller;
48		#interrupt-cells = <4>; /* {IRQ/FIQ, IRQ_NUM, IRQ_TYPE, IRQ_PRIO} */
49		status = "okay";
50	};
51
52	pinctrl: pinctrl@11c000 {
53		compatible = "ti,k3-pinctrl";
54		reg = <0x0011c000 0x2b4>;
55		status = "okay";
56	};
57
58	uart1: uart@2810000 {
59		compatible = "ns16550";
60		reg = <0x02810000 0x100>;
61		clock-frequency = <48000000>;
62		interrupts = <0 159 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
63		interrupt-parent = <&vim>;
64		reg-shift = <2>;
65		status = "disabled";
66	};
67
68	uart2: uart@2820000 {
69		compatible = "ns16550";
70		reg = <0x02820000 0x100>;
71		clock-frequency = <48000000>;
72		interrupts = <0 160 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
73		interrupt-parent = <&vim>;
74		reg-shift = <2>;
75		status = "disabled";
76	};
77
78	systick_timer: timer@24c0000 {
79		compatible = "ti,am654-timer";
80		reg = <0x24c0000 0x70>;
81		interrupts = <0 168 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
82		interrupt-parent = <&vim>;
83		status = "disabled";
84	};
85};
86