1 /* 2 * Copyright (c) 2022 Antmicro <www.antmicro.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_DRIVERS_SERIAL_UART_QL_USBSERIALPORT_S3B_H_ 8 #define ZEPHYR_DRIVERS_SERIAL_UART_QL_USBSERIALPORT_S3B_H_ 9 10 #include <stdint.h> 11 12 #define USBSERIAL_TX_FIFOSIZE (512) 13 #define USBSERIAL_RX_FIFOSIZE (512) 14 15 /* USB-Serial FIFO status values */ 16 #define USBSERIAL_RX_FIFO_EMPTY (0x00) /* 0000 Empty */ 17 #define USBSERIAL_RX_FIFO_E1 (0x01) /* 0001 1 entry in FIFO */ 18 #define USBSERIAL_RX_FIFO_GE_2 (0x02) /* 0010 At least 2 entries */ 19 #define USBSERIAL_RX_FIFO_GE_4 (0x03) /* 0011 At least 4 entries */ 20 #define USBSERIAL_RX_FIFO_GE_8 (0x04) /* 0100 At least 8 entries */ 21 #define USBSERIAL_RX_FIFO_GE_16 (0x0A) /* 1010 At least 16 entries */ 22 #define USBSERIAL_RX_FIFO_GE_32 (0x0B) /* 1011 At least 32 entries */ 23 #define USBSERIAL_RX_FIFO_LT_QUARTER (0x0C) /* 1100 Less than 1/4 to 64 entries */ 24 #define USBSERIAL_RX_FIFO_GT_QUARTE (0x0D) /* 1101 1/4 or more full */ 25 #define USBSERIAL_RX_FIFO_GT_HALF (0x0E) /* 1110 1/2 or more full */ 26 #define USBSERIAL_RX_FIFO_FULL (0x0F) /* 1111 Full */ 27 28 #define USBSERIAL_TX_FIFO_FULL (0x00) /* 0000 Full */ 29 #define USBSERIAL_TX_FIFO_EMPTY (0x01) /* 0001 Empty */ 30 #define USBSERIAL_TX_FIFO_GT_HALF (0x02) /* 0010 Room for more than 1/2 */ 31 #define USBSERIAL_TX_FIFO_GT_QUARTER (0x03) /* 0011 Room for more than 1/4 */ 32 #define USBSERIAL_TX_FIFO_LT_QUARTER (0x04) /* 0100 Room for less than 1/4 */ 33 #define USBSERIAL_TX_FIFO_32_TO_63 (0x0A) /* 1010 Room for 32 to 63 */ 34 #define USBSERIAL_TX_FIFO_16_TO_31 (0x0B) /* 1011 Room for 16 to 31 */ 35 #define USBSERIAL_TX_FIFO_8_TO_15 (0x0C) /* 1100 Room for 8 to 15 */ 36 #define USBSERIAL_TX_FIFO_4_TO_7 (0x0D) /* 1101 Room for 4 to 7 */ 37 #define USBSERIAL_TX_FIFO_GE_2 (0x0E) /* 1110 Room for at least 2 */ 38 #define USBSERIAL_TX_FIFO_GE_1 (0x0F) /* 1111 Room for at least 1 */ 39 40 struct fpga_usbserial_regs { 41 uint32_t device_id; 42 uint32_t rev_num; 43 uint16_t scratch_reg; 44 uint16_t reserved1; 45 uint32_t clock_select; 46 uint32_t usbpid; 47 uint32_t reserved2[11]; 48 unsigned u2m_fifo_flags : 4; 49 unsigned reserved3 : 28; 50 unsigned rdata : 8; 51 unsigned reserved4 : 24; 52 uint32_t reserved5[14]; 53 unsigned m2u_fifo_flags : 4; 54 unsigned reserved6 : 28; 55 unsigned wdata : 8; 56 unsigned reserved7 : 24; 57 uint32_t reserved8[14]; 58 unsigned u2m_fifo_int_en : 1; 59 unsigned reserved9 : 31; 60 }; 61 62 #endif /* ZEPHYR_DRIVERS_SERIAL_UART_QL_USBSERIALPORT_S3B_H_ */ 63
