1/*
2 * Copyright (c) 2017 Piotr Mienkowski
3 * Copyright (c) 2017 Justin Watson
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8#include <arm/armv7-m.dtsi>
9#include <zephyr/dt-bindings/adc/adc.h>
10#include <zephyr/dt-bindings/i2c/i2c.h>
11#include <zephyr/dt-bindings/gpio/gpio.h>
12#include <zephyr/dt-bindings/pwm/pwm.h>
13#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
14
15/ {
16	aliases {
17		watchdog0 = &wdt;
18	};
19
20	chosen {
21		zephyr,flash-controller = &eefc;
22	};
23
24	chosen {
25		zephyr,entropy = &trng;
26	};
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		cpu0: cpu@0 {
33			device_type = "cpu";
34			compatible = "arm,cortex-m7";
35			reg = <0>;
36			#address-cells = <1>;
37			#size-cells = <1>;
38
39			mpu: mpu@e000ed90 {
40				compatible = "arm,armv7m-mpu";
41				reg = <0xe000ed90 0x40>;
42			};
43		};
44	};
45
46	sram0: memory@20400000 {
47		compatible = "mmio-sram";
48	};
49
50	soc {
51		pmc: pmc@400e0600 {
52			compatible = "atmel,sam-pmc";
53			reg = <0x400e0600 0x200>;
54			interrupts = <5 0>;
55			#clock-cells = <2>;
56			status = "okay";
57		};
58
59		supc: supc@400e1810 {
60			compatible = "atmel,sam-supc";
61			reg = <0x400e1810 0x20>;
62			#wakeup-source-id-cells = <1>;
63			status = "okay";
64		};
65
66		eefc: flash-controller@400e0c00 {
67			compatible = "atmel,sam-flash-controller";
68			reg = <0x400e0c00 0x200>;
69			interrupts = <6 0>;
70			clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
71
72			#address-cells = <1>;
73			#size-cells = <1>;
74			#erase-block-cells = <2>;
75
76			flash0: flash@400000 {
77				compatible = "atmel,sam-flash", "soc-nv-flash";
78				write-block-size = <16>;
79				erase-block-size = <8192>;
80			};
81		};
82
83		wdt: watchdog@400e1850 {
84			compatible = "atmel,sam-watchdog";
85			reg = <0x400e1850 0xc>;
86			interrupts = <4 0>;
87			clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
88			status = "disabled";
89		};
90
91		twihs0: i2c@40018000 {
92			compatible = "atmel,sam-i2c-twihs";
93			clock-frequency = <I2C_BITRATE_STANDARD>;
94			#address-cells = <1>;
95			#size-cells = <0>;
96			reg = <0x40018000 0x12B>;
97			interrupts = <19 0>;
98			clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
99			status = "disabled";
100		};
101
102		twihs1: i2c@4001c000 {
103			compatible = "atmel,sam-i2c-twihs";
104			clock-frequency = <I2C_BITRATE_STANDARD>;
105			#address-cells = <1>;
106			#size-cells = <0>;
107			reg = <0x4001c000 0x12B>;
108			interrupts = <20 0>;
109			clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
110			status = "disabled";
111		};
112
113		twihs2: i2c@40060000 {
114			compatible = "atmel,sam-i2c-twihs";
115			clock-frequency = <I2C_BITRATE_STANDARD>;
116			#address-cells = <1>;
117			#size-cells = <0>;
118			reg = <0x40060000 0x12B>;
119			interrupts = <41 0>;
120			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
121			status = "disabled";
122		};
123
124		spi0: spi@40008000 {
125			compatible = "atmel,sam-spi";
126			#address-cells = <1>;
127			#size-cells = <0>;
128			reg = <0x40008000 0x4000>;
129			interrupts = <21 0>;
130			clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
131			status = "disabled";
132		};
133
134		spi1: spi@40058000 {
135			compatible = "atmel,sam-spi";
136			#address-cells = <1>;
137			#size-cells = <0>;
138			reg = <0x40058000 0x4000>;
139			interrupts = <42 0>;
140			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
141			status = "disabled";
142		};
143
144		uart0: uart@400e0800 {
145			compatible = "atmel,sam-uart";
146			reg = <0x400e0800 0x100>;
147			interrupts = <7 1>;
148			clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
149			status = "disabled";
150		};
151
152		uart1: uart@400e0a00 {
153			compatible = "atmel,sam-uart";
154			reg = <0x400e0a00 0x100>;
155			interrupts = <8 1>;
156			clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
157			status = "disabled";
158		};
159
160		uart2: uart@400e1a00 {
161			compatible = "atmel,sam-uart";
162			reg = <0x400e1a00 0x100>;
163			interrupts = <44 1>;
164			clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
165			status = "disabled";
166		};
167
168		uart3: uart@400e1c00 {
169			compatible = "atmel,sam-uart";
170			reg = <0x400e1c00 0x100>;
171			interrupts = <45 1>;
172			clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
173			status = "disabled";
174		};
175
176		uart4: uart@400e1e00 {
177			compatible = "atmel,sam-uart";
178			reg = <0x400e1e00 0x100>;
179			interrupts = <46 1>;
180			clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
181			status = "disabled";
182		};
183
184		usart0: usart@40024000 {
185			compatible = "atmel,sam-usart";
186			reg = <0x40024000 0x100>;
187			interrupts = <13 0>;
188			clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
189			status = "disabled";
190		};
191
192		usart1: usart@40028000 {
193			compatible = "atmel,sam-usart";
194			reg = <0x40028000 0x100>;
195			interrupts = <14 0>;
196			clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
197			status = "disabled";
198		};
199
200		usart2: usart@4002c000 {
201			compatible = "atmel,sam-usart";
202			reg = <0x4002c000 0x100>;
203			interrupts = <15 0>;
204			clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
205			status = "disabled";
206		};
207
208		afec0: adc@4003c000 {
209			compatible = "atmel,sam-afec";
210			reg = <0x4003c000 0x100>;
211			interrupts = <29 0>;
212			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
213			status = "disabled";
214			#io-channel-cells = <1>;
215		};
216
217		afec1: adc@40064000 {
218			compatible = "atmel,sam-afec";
219			reg = <0x40064000 0x100>;
220			interrupts = <40 0>;
221			clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
222			status = "disabled";
223			#io-channel-cells = <1>;
224		};
225
226		dacc: dacc@40040000 {
227			compatible = "atmel,sam-dac";
228			reg = <0x40040000 0x100>;
229			interrupts = <30 0>;
230			clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
231			status = "disabled";
232			#io-channel-cells = <1>;
233		};
234
235		pinctrl: pinctrl@400e0e00 {
236			compatible = "atmel,sam-pinctrl";
237			#address-cells = <1>;
238			#size-cells = <1>;
239			ranges = <0x400e0e00 0x400e0e00 0xa00>;
240
241			pioa: gpio@400e0e00 {
242				compatible = "atmel,sam-gpio";
243				reg = <0x400e0e00 0x190>;
244				interrupts = <10 1>;
245				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
246				gpio-controller;
247				#gpio-cells = <2>;
248				#atmel,pin-cells = <2>;
249			};
250
251			piob: gpio@400e1000 {
252				compatible = "atmel,sam-gpio";
253				reg = <0x400e1000 0x190>;
254				interrupts = <11 1>;
255				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
256				gpio-controller;
257				#gpio-cells = <2>;
258				#atmel,pin-cells = <2>;
259			};
260
261			pioc: gpio@400e1200 {
262				compatible = "atmel,sam-gpio";
263				reg = <0x400e1200 0x190>;
264				interrupts = <12 1>;
265				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
266				gpio-controller;
267				#gpio-cells = <2>;
268				#atmel,pin-cells = <2>;
269			};
270
271			piod: gpio@400e1400 {
272				compatible = "atmel,sam-gpio";
273				reg = <0x400e1400 0x190>;
274				interrupts = <16 1>;
275				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
276				gpio-controller;
277				#gpio-cells = <2>;
278				#atmel,pin-cells = <2>;
279			};
280
281			pioe: gpio@400e1600 {
282				compatible = "atmel,sam-gpio";
283				reg = <0x400e1600 0x190>;
284				interrupts = <17 1>;
285				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
286				gpio-controller;
287				#gpio-cells = <2>;
288				#atmel,pin-cells = <2>;
289			};
290		};
291
292		pwm0: pwm0@40020000 {
293			compatible = "atmel,sam-pwm";
294			reg = <0x40020000 0x4000>;
295			interrupts = <31 0>;
296			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
297			status = "disabled";
298			prescaler = <10>;
299			divider = <1>;
300			#pwm-cells = <3>;
301		};
302
303		pwm1: pwm1@4005c000 {
304			compatible = "atmel,sam-pwm";
305			reg = <0x4005c000 0x4000>;
306			interrupts = <60 0>;
307			clocks = <&pmc PMC_TYPE_PERIPHERAL 60>;
308			status = "disabled";
309			prescaler = <10>;
310			divider = <1>;
311			#pwm-cells = <3>;
312		};
313
314		usbhs: usbd@40038000 {
315			compatible = "atmel,sam-usbhs";
316			#address-cells = <1>;
317			#size-cells = <0>;
318			reg = <0x40038000 0x4000>;
319			interrupts = <34 0>;
320			interrupt-names = "usbhs";
321			maximum-speed = "high-speed";
322			num-bidir-endpoints = <10>;
323			clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
324			status = "disabled";
325		};
326
327		gmac: ethernet@40050000 {
328			compatible = "atmel,sam-gmac";
329			reg = <0x40050000 0x4000>;
330			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
331			interrupts = <39 0>, <66 0>, <67 0>;
332			interrupt-names = "gmac", "q1", "q2";
333			num-queues = <3>;
334			local-mac-address = [00 00 00 00 00 00];
335			status = "disabled";
336		};
337
338		mdio: mdio@40050000 {
339			compatible = "atmel,sam-mdio";
340			reg = <0x40050000 0x4000>;
341			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
342			status = "disabled";
343			#address-cells = <1>;
344			#size-cells = <0>;
345		};
346
347		tc0: tc@4000c000 {
348			compatible = "atmel,sam-tc";
349			reg = <0x4000c000 0x100>;
350			interrupts = <23 0
351				      24 0
352				      25 0>;
353			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>,
354				 <&pmc PMC_TYPE_PERIPHERAL 24>,
355				 <&pmc PMC_TYPE_PERIPHERAL 25>;
356			status = "disabled";
357
358			qdec {
359				compatible = "atmel,sam-tc-qdec";
360				status = "disabled";
361			};
362		};
363
364		tc1: tc@40010000 {
365			compatible = "atmel,sam-tc";
366			reg = <0x40010000 0x100>;
367			interrupts = <26 0
368				      27 0
369				      28 0>;
370			clocks = <&pmc PMC_TYPE_PERIPHERAL 26>,
371				 <&pmc PMC_TYPE_PERIPHERAL 27>,
372				 <&pmc PMC_TYPE_PERIPHERAL 28>;
373			status = "disabled";
374
375			qdec {
376				compatible = "atmel,sam-tc-qdec";
377				status = "disabled";
378			};
379		};
380
381		tc2: tc@40014000 {
382			compatible = "atmel,sam-tc";
383			reg = <0x40014000 0x100>;
384			interrupts = <47 0
385				      48 0
386				      49 0>;
387			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>,
388				 <&pmc PMC_TYPE_PERIPHERAL 48>,
389				 <&pmc PMC_TYPE_PERIPHERAL 49>;
390			status = "disabled";
391
392			qdec {
393				compatible = "atmel,sam-tc-qdec";
394				status = "disabled";
395			};
396		};
397
398		tc3: tc@40054000 {
399			compatible = "atmel,sam-tc";
400			reg = <0x40054000 0x100>;
401			interrupts = <50 0
402				      51 0
403				      52 0>;
404			clocks = <&pmc PMC_TYPE_PERIPHERAL 50>,
405				 <&pmc PMC_TYPE_PERIPHERAL 51>,
406				 <&pmc PMC_TYPE_PERIPHERAL 52>;
407			status = "disabled";
408
409			qdec {
410				compatible = "atmel,sam-tc-qdec";
411				status = "disabled";
412			};
413		};
414
415		trng: random@40070000 {
416			compatible = "atmel,sam-trng";
417			reg = <0x40070000 0x4000>;
418			interrupts = <57 0>;
419			clocks = <&pmc PMC_TYPE_PERIPHERAL 57>;
420			status = "okay";
421		};
422
423		xdmac: dma0: dma-controller@40078000 {
424			compatible = "atmel,sam-xdmac";
425			reg = <0x40078000 0x400>;
426			interrupts = <58 0>;
427			clocks = <&pmc PMC_TYPE_PERIPHERAL 58>;
428			#dma-cells = <2>;
429			status = "disabled";
430		};
431
432		ssc: ssc@40004000 {
433			compatible = "atmel,sam-ssc";
434			reg = <0x40004000 0x4000>;
435			interrupts = <22 0>;
436			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
437			status = "disabled";
438		};
439
440		can0: can@40030000 {
441			compatible = "atmel,sam-can";
442			reg = <0x40030000 0x100>, <0x40088110 0x04>;
443			reg-names = "m_can", "dma_base";
444			interrupts = <35 0>, <36 0>;
445			interrupt-names = "int0", "int1";
446			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
447			divider = <6>;
448			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
449			status = "disabled";
450		};
451
452		can1: can@40034000 {
453			compatible = "atmel,sam-can";
454			reg = <0x40034000 0x100>, <0x40088114 0x4>;
455			reg-names = "m_can", "dma_base";
456			interrupts = <37 0>, <38 0>;
457			interrupt-names = "int0", "int1";
458			clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
459			divider = <6>;
460			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
461			status = "disabled";
462		};
463
464		rstc: rstc@400e1800 {
465			compatible = "atmel,sam-rstc";
466			reg = <0x400e1800 0x10>;
467			clocks = <&pmc PMC_TYPE_PERIPHERAL 1>;
468			user-nrst;
469		};
470
471		rtc: rtc@400e1860 {
472			compatible = "atmel,sam-rtc";
473			reg = <0x400e1860 0x100>;
474			interrupts = <2 0>;
475			clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
476			alarms-count = <1>;
477			status = "disabled";
478		};
479	};
480};
481
482&nvic {
483	arm,num-irq-priority-bits = <3>;
484};
485