1/*
2 * Copyright 2023-2025 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "nxp_mcxw7x_common.dtsi"
8
9&fmu {
10	ranges = <0x0 0x10000000 DT_SIZE_M(1)>;
11};
12
13&flash {
14	reg = <0x0 DT_SIZE_M(1)>;
15};
16
17&ctcm {
18	ranges = <0x0 0x14000000 DT_SIZE_K(16)>;
19};
20
21&ctcm0 {
22	reg = <0x0 DT_SIZE_K(16)>;
23};
24
25&stcm {
26	ranges = <0x0 0x30000000 DT_SIZE_K(112)>;
27
28	stcm1: system_memory@1a000 {
29		compatible = "zephyr,memory-region","mmio-sram";
30		reg = <0x1a000 DT_SIZE_K(8)>;
31		zephyr,memory-region = "RetainedMem";
32	};
33};
34
35&stcm0 {
36	/* With only the first 64KB having ECC */
37	reg = <0x0 DT_SIZE_K(104)>;
38};
39
40&pbridge2 {
41	reg = <0x0 0x4b000>;
42};
43
44&porta {
45	reg = <0x42000 0xdc>;
46};
47
48&portb {
49	reg = <0x43000 0xdc>;
50};
51
52&portc {
53	reg = <0x44000 0xdc>;
54};
55
56&portd {
57	reg = <0x45000 0xdc>;
58};
59
60&smu2 {
61	ranges = <0x0 0x1c0000 DT_SIZE_K(40)>;
62};
63
64&rtc {
65	reg = <0x4002c000 0x50>;
66};
67