1 /*
2 * Copyright (c) 2021-22, Arm Limited. All rights reserved.
3 * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
4 * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 *
8 */
9
10 #include "extra_s_tests.h"
11 #include "platform_base_address.h"
12 #include "firewall.h"
13 #include "tfm_sp_log.h"
14 #include "s_io_storage_test.h"
15
16 /* TODO: if needed each test function can be made as a separate test case, in
17 * such case EXTRA_TEST_XX definitions can be removed */
18 #define EXTRA_TEST_SUCCESS 0
19 #define EXTRA_TEST_FAILED -1
20
21 #define DISABLED_TEST 0
22
23 int test_io_storage_multiple_flash_simultaneous(void);
24
25 enum host_firewall_host_comp_id_t {
26 HOST_FCTRL = (0x00u),
27 COMP_SYSPERIPH,
28 COMP_DBGPERIPH,
29 COMP_AONPERIPH,
30 COMP_XNVM,
31 COMP_CVM,
32 COMP_HOSTCPU,
33 COMP_EXTSYS0,
34 COMP_EXTSYS1,
35 COMP_EXPSLV0,
36 COMP_EXPSLV1,
37 COMP_EXPMST0,
38 COMP_EXPMST1,
39 COMP_OCVM,
40 COMP_DEBUG,
41 };
42
test_host_firewall_status(void)43 static int test_host_firewall_status(void)
44 {
45 enum fw_lockdown_status_t status;
46 uint32_t any_component_id = 2;
47
48 fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, any_component_id);
49 status = fw_get_lockdown_status();
50 if (status != FW_LOCKED) {
51 LOG_INFFMT("FAIL: %s.\n\r", __func__);
52 return EXTRA_TEST_FAILED;
53 }
54
55 LOG_INFFMT("PASS: %s\n\r", __func__);
56 return EXTRA_TEST_SUCCESS;
57 }
58
test_host_firewall_external_flash_configurations(void)59 static int test_host_firewall_external_flash_configurations(void)
60 {
61 enum rgn_mpl_t mpl_rights = 0;
62 enum rgn_mpl_t expected_rights = 0;
63
64 #if !(PLATFORM_IS_FVP)
65 /* External flash */
66 fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST0);
67 fc_select_region(3);
68 fc_read_mpl(RGN_MPE0, &mpl_rights);
69 expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
70 RGN_MPL_SECURE_WRITE_MASK);
71 if (mpl_rights != expected_rights) {
72 LOG_INFFMT("FAIL1: %s.\n\r", __func__);
73 return EXTRA_TEST_FAILED;
74 }
75 /* XIP Permissions */
76 fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
77 fc_select_region(1);
78 fc_read_mpl(RGN_MPE0, &mpl_rights);
79 expected_rights = (RGN_MPL_ANY_MST_MASK |
80 RGN_MPL_SECURE_READ_MASK |
81 RGN_MPL_NONSECURE_READ_MASK);
82 if (mpl_rights != expected_rights) {
83 LOG_INFFMT("FAIL2: %s.\n\r", __func__);
84 return EXTRA_TEST_FAILED;
85 }
86 #else
87 /* Enable the below test when FVP Host Firewall is configured. */
88 /*
89 fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_XNVM);
90 fc_select_region(1);
91 fc_read_mpl(RGN_MPE0, &mpl_rights);
92 tfm_log_printf("mpl rights = %d\n\r", mpl_rights);
93 expected_rights = (RGN_MPL_ANY_MST_MASK |
94 RGN_MPL_SECURE_READ_MASK |
95 RGN_MPL_SECURE_WRITE_MASK |
96 RGN_MPL_NONSECURE_READ_MASK |
97 RGN_MPL_NONSECURE_WRITE_MASK);
98 if (mpl_rights != expected_rights) {
99 tfm_log_printf("FAIL1: %s.\n\r", __func__);
100 return EXTRA_TEST_FAILED;
101 }
102 */
103 #endif
104
105 LOG_INFFMT("PASS: %s\n\r", __func__);
106 return EXTRA_TEST_SUCCESS;
107 }
108
test_host_firewall_secure_flash_configurations(void)109 static int test_host_firewall_secure_flash_configurations(void)
110 {
111 enum rgn_mpl_t mpl_rights = 0;
112 enum rgn_mpl_t expected_rights = 0;
113
114 #if !(PLATFORM_IS_FVP)
115 /* External flash */
116 fc_select((void *)CORSTONE1000_HOST_FIREWALL_BASE, COMP_EXPMST1);
117 fc_select_region(1);
118 fc_read_mpl(RGN_MPE0, &mpl_rights);
119 expected_rights = (RGN_MPL_ANY_MST_MASK | RGN_MPL_SECURE_READ_MASK |
120 RGN_MPL_SECURE_WRITE_MASK);
121 if (mpl_rights != expected_rights) {
122 LOG_INFFMT("FAIL: %s.\n\r", __func__);
123 return EXTRA_TEST_FAILED;
124 }
125 #endif
126
127 LOG_INFFMT("PASS: %s\n\r", __func__);
128 return EXTRA_TEST_SUCCESS;
129 }
130
test_bir_programming(void)131 static int test_bir_programming(void)
132 {
133 /* BIR is expected to bhaive like write once register */
134
135 volatile uint32_t *bir_base = (uint32_t *)CORSTONE1000_HOST_BIR_BASE;
136
137 bir_base[0] = 0x1;
138 bir_base[0] = 0x2;
139 if (bir_base[0] != 0x1) {
140 LOG_INFFMT("FAIL: %s : (%u)\n\r", __func__, bir_base[0]);
141 return EXTRA_TEST_FAILED;
142 }
143
144 LOG_INFFMT("PASS: %s\n\r", __func__);
145 return EXTRA_TEST_SUCCESS;
146 }
147
s_test(struct test_result_t * ret)148 void s_test(struct test_result_t *ret)
149 {
150 int status;
151 int failures = 0;
152
153 #if (DISABLED_TEST == 1)
154 status = test_host_firewall_status();
155 if (status) {
156 failures++;
157 }
158 #endif
159
160 status = test_host_firewall_secure_flash_configurations();
161 if (status) {
162 failures++;
163 }
164
165 status = test_host_firewall_external_flash_configurations();
166 if (status) {
167 failures++;
168 }
169
170 #if (DISABLED_TEST == 1)
171 status = test_bir_programming();
172 if (status) {
173 failures++;
174 }
175 #endif
176
177 if (failures) {
178 LOG_INFFMT("Not all platform test could pass: failures=%d\n\r", failures);
179 ret->val = TEST_FAILED;
180 return;
181 }
182
183 LOG_INFFMT("ALL_PASS: corstone1000 platform test cases passed.\n\r");
184 ret->val = TEST_PASSED;
185 }
186
187 static struct test_t plat_s_t[] = {
188 {&s_test, "TFM_S_EXTRA_TEST_1001",
189 "Extra Secure test"},
190 {&s_test_io_storage_multiple_flash_simultaneous, "TFM_S_EXTRA_TEST_1002",
191 "Extra Secure test: io storage access multiple flash simultaneous"},
192 };
193
register_testsuite_extra_s_interface(struct test_suite_t * p_test_suite)194 void register_testsuite_extra_s_interface(struct test_suite_t *p_test_suite)
195 {
196 uint32_t list_size;
197
198 list_size = (sizeof(plat_s_t) /
199 sizeof(plat_s_t[0]));
200
201 set_testsuite("Extra Secure interface tests"
202 "(TFM_S_EXTRA_TEST_1XXX)",
203 plat_s_t, list_size, p_test_suite);
204 }
205
