1 /*
2 * Copyright (c) 2025 Silicon Laboratories Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <errno.h>
8 #include <zephyr/irq.h>
9 #include <zephyr/sys/util.h>
10 #include <zephyr/sys/util_macro.h>
11 #include <zephyr/device.h>
12 #include <zephyr/devicetree.h>
13 #include <zephyr/drivers/pwm.h>
14 #include <zephyr/drivers/pinctrl.h>
15 #include <zephyr/drivers/clock_control.h>
16 #include <zephyr/types.h>
17 #include "sl_si91x_pwm.h"
18
19 #define DT_DRV_COMPAT silabs_siwx91x_pwm
20
21 #define PWM_CHANNELS 4
22 #define DEFAULT_VALUE 0xFF
23
24 struct pwm_siwx91x_channel_config {
25 uint8_t duty_cycle;
26 uint32_t frequency;
27 bool is_chan_active;
28 };
29
30 struct pwm_siwx91x_config {
31 /* Pointer to the clock device structure */
32 const struct device *clock_dev;
33 /* Clock control subsystem */
34 clock_control_subsys_t clock_subsys;
35 /* Pointer to the pin control device configuration */
36 const struct pinctrl_dev_config *pcfg;
37 /* Prescaler information of the channels */
38 uint8_t ch_prescaler[PWM_CHANNELS];
39 /* Common PWM polarity for all the channels */
40 uint8_t pwm_polarity;
41 };
42
43 struct pwm_siwx91x_data {
44 struct pwm_siwx91x_channel_config pwm_channel_cfg[PWM_CHANNELS];
45 };
46
47 /* Function to convert prescaler value to a programmable reg value */
siwx91x_prescale_convert(uint8_t prescale)48 static int siwx91x_prescale_convert(uint8_t prescale)
49 {
50 switch (prescale) {
51 case 1:
52 return SL_TIME_PERIOD_PRESCALE_1;
53 case 2:
54 return SL_TIME_PERIOD_PRESCALE_2;
55 case 4:
56 return SL_TIME_PERIOD_PRESCALE_4;
57 case 8:
58 return SL_TIME_PERIOD_PRESCALE_8;
59 case 16:
60 return SL_TIME_PERIOD_PRESCALE_16;
61 case 32:
62 return SL_TIME_PERIOD_PRESCALE_32;
63 case 64:
64 return SL_TIME_PERIOD_PRESCALE_64;
65 default:
66 return -EINVAL;
67 }
68 }
69
70 /* Program PWM channel with the default configurations */
siwx91x_default_channel_config(const struct device * dev,uint32_t channel)71 static int siwx91x_default_channel_config(const struct device *dev, uint32_t channel)
72 {
73 const struct pwm_siwx91x_config *config = dev->config;
74 int prescale_reg_value = siwx91x_prescale_convert(config->ch_prescaler[channel]);
75 int ret;
76
77 if (prescale_reg_value < 0) {
78 return -EINVAL;
79 }
80
81 ret = sl_si91x_pwm_set_output_mode(SL_MODE_INDEPENDENT, channel);
82 if (ret) {
83 return -EINVAL;
84 }
85
86 ret = sl_si91x_pwm_set_base_timer_mode(SL_FREE_RUN_MODE, channel);
87 if (ret) {
88 return -EINVAL;
89 }
90
91 ret = sl_si91x_pwm_control_base_timer(SL_BASE_TIMER_EACH_CHANNEL);
92 if (ret) {
93 return -EINVAL;
94 }
95
96 ret = sl_si91x_pwm_control_period(SL_TIME_PERIOD_POSTSCALE_1_1, prescale_reg_value,
97 channel);
98 if (ret) {
99 return -EINVAL;
100 }
101
102 return 0;
103 }
104
pwm_siwx91x_set_cycles(const struct device * dev,uint32_t channel,uint32_t period_cycles,uint32_t pulse_cycles,pwm_flags_t flags)105 static int pwm_siwx91x_set_cycles(const struct device *dev, uint32_t channel,
106 uint32_t period_cycles, uint32_t pulse_cycles, pwm_flags_t flags)
107 {
108 const struct pwm_siwx91x_config *config = dev->config;
109 struct pwm_siwx91x_data *data = dev->data;
110 uint32_t prev_period;
111 uint32_t duty_cycle;
112 int ret;
113
114 if (channel >= ARRAY_SIZE(data->pwm_channel_cfg)) {
115 return -EINVAL;
116 }
117
118 if (config->pwm_polarity != flags) {
119 /* Polarity mismatch */
120 return -ENOTSUP;
121 }
122
123 if (data->pwm_channel_cfg[channel].is_chan_active == false) {
124 /* Configure the channel with default parameters */
125 ret = siwx91x_default_channel_config(dev, channel);
126 if (ret) {
127 return -EINVAL;
128 }
129 }
130
131 ret = sl_si91x_pwm_get_time_period(channel, (uint16_t *)&prev_period);
132 if (ret) {
133 return -EINVAL;
134 }
135
136 if (period_cycles != prev_period) {
137 ret = sl_si91x_pwm_set_time_period(channel, period_cycles, 0);
138 if (ret) {
139 /* Programmed value must be out of range (>65535) */
140 return -EINVAL;
141 }
142 }
143
144 /* Calculate the duty cycle */
145 duty_cycle = pulse_cycles * 100;
146 duty_cycle /= period_cycles;
147
148 if (duty_cycle != data->pwm_channel_cfg[channel].duty_cycle) {
149 ret = sl_si91x_pwm_set_duty_cycle(pulse_cycles, channel);
150 if (ret) {
151 return -EINVAL;
152 }
153 data->pwm_channel_cfg[channel].duty_cycle = duty_cycle;
154 }
155
156 if (data->pwm_channel_cfg[channel].is_chan_active == false) {
157 /* Start PWM after configuring the channel for first time */
158 ret = sl_si91x_pwm_start(channel);
159 if (ret) {
160 return -EINVAL;
161 }
162 data->pwm_channel_cfg[channel].is_chan_active = true;
163 }
164
165 return 0;
166 }
167
pwm_siwx91x_get_cycles_per_sec(const struct device * dev,uint32_t channel,uint64_t * cycles)168 static int pwm_siwx91x_get_cycles_per_sec(const struct device *dev, uint32_t channel,
169 uint64_t *cycles)
170 {
171 struct pwm_siwx91x_data *data = dev->data;
172
173 if (channel >= ARRAY_SIZE(data->pwm_channel_cfg)) {
174 return -EINVAL;
175 }
176
177 *cycles = (uint64_t)data->pwm_channel_cfg[channel].frequency;
178
179 return 0;
180 }
181
pwm_siwx91x_init(const struct device * dev)182 static int pwm_siwx91x_init(const struct device *dev)
183 {
184 const struct pwm_siwx91x_config *config = dev->config;
185 struct pwm_siwx91x_data *data = dev->data;
186 bool polarity_inverted = (config->pwm_polarity == PWM_POLARITY_INVERTED);
187 uint32_t pwm_frequency;
188 int ret;
189
190 ret = clock_control_on(config->clock_dev, config->clock_subsys);
191 if (ret) {
192 return ret;
193 }
194
195 ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &pwm_frequency);
196 if (ret) {
197 return ret;
198 }
199
200 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
201 if (ret) {
202 return ret;
203 }
204
205 ARRAY_FOR_EACH(data->pwm_channel_cfg, i) {
206 data->pwm_channel_cfg[i].frequency = pwm_frequency / config->ch_prescaler[i];
207 }
208
209 ret = sl_si91x_pwm_set_output_polarity(polarity_inverted, !polarity_inverted);
210 if (ret) {
211 return -EINVAL;
212 }
213
214 return 0;
215 }
216
217 static DEVICE_API(pwm, pwm_siwx91x_driver_api) = {
218 .set_cycles = pwm_siwx91x_set_cycles,
219 .get_cycles_per_sec = pwm_siwx91x_get_cycles_per_sec,
220 };
221
222 #define SIWX91X_PWM_INIT(inst) \
223 PINCTRL_DT_INST_DEFINE(inst); \
224 static struct pwm_siwx91x_data pwm_siwx91x_data_##inst; \
225 static const struct pwm_siwx91x_config pwm_config_##inst = { \
226 .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
227 .clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \
228 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
229 .ch_prescaler = DT_INST_PROP(inst, silabs_ch_prescaler), \
230 .pwm_polarity = DT_INST_PROP(inst, silabs_pwm_polarity), \
231 }; \
232 DEVICE_DT_INST_DEFINE(inst, &pwm_siwx91x_init, NULL, &pwm_siwx91x_data_##inst, \
233 &pwm_config_##inst, PRE_KERNEL_1, CONFIG_PWM_INIT_PRIORITY, \
234 &pwm_siwx91x_driver_api);
235
236 DT_INST_FOREACH_STATUS_OKAY(SIWX91X_PWM_INIT)
237
