1 /*
2 * Copyright (c) 2021 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nuvoton_npcx_ps2_channel
8
9 /**
10 * @file
11 * @brief Nuvoton NPCX PS/2 driver
12 *
13 * This file contains the driver of PS/2 buses (channels) which provides the
14 * connection between Zephyr PS/2 API functions and NPCX PS/2 controller driver
15 * to support PS/2 transactions.
16 *
17 */
18
19 #include <zephyr/drivers/clock_control.h>
20 #include <zephyr/drivers/pinctrl.h>
21 #include <zephyr/drivers/ps2.h>
22 #include <soc.h>
23
24 #include <zephyr/logging/log.h>
25 LOG_MODULE_REGISTER(ps2_npcx_channel, CONFIG_PS2_LOG_LEVEL);
26
27 #include "ps2_npcx_controller.h"
28
29 /* Device config */
30 struct ps2_npcx_ch_config {
31 /* Indicate the channel's number of the PS/2 channel device */
32 uint8_t channel_id;
33 const struct device *ps2_ctrl;
34 /* pinmux configuration */
35 const struct pinctrl_dev_config *pcfg;
36 };
37
38 /* PS/2 api functions */
ps2_npcx_ch_configure(const struct device * dev,ps2_callback_t callback_isr)39 static int ps2_npcx_ch_configure(const struct device *dev,
40 ps2_callback_t callback_isr)
41 {
42 const struct ps2_npcx_ch_config *const config = dev->config;
43 int ret;
44
45 ret = ps2_npcx_ctrl_configure(config->ps2_ctrl, config->channel_id,
46 callback_isr);
47 if (ret != 0) {
48 return ret;
49 }
50
51 return ps2_npcx_ctrl_enable_interface(config->ps2_ctrl,
52 config->channel_id, 1);
53 }
54
ps2_npcx_ch_write(const struct device * dev,uint8_t value)55 static int ps2_npcx_ch_write(const struct device *dev, uint8_t value)
56 {
57 const struct ps2_npcx_ch_config *const config = dev->config;
58
59 return ps2_npcx_ctrl_write(config->ps2_ctrl, config->channel_id, value);
60 }
61
ps2_npcx_ch_enable_interface(const struct device * dev)62 static int ps2_npcx_ch_enable_interface(const struct device *dev)
63 {
64 const struct ps2_npcx_ch_config *const config = dev->config;
65
66 return ps2_npcx_ctrl_enable_interface(config->ps2_ctrl,
67 config->channel_id, 1);
68 }
69
ps2_npcx_ch_inhibit_interface(const struct device * dev)70 static int ps2_npcx_ch_inhibit_interface(const struct device *dev)
71 {
72 const struct ps2_npcx_ch_config *const config = dev->config;
73
74 return ps2_npcx_ctrl_enable_interface(config->ps2_ctrl,
75 config->channel_id, 0);
76 }
77
78 /* PS/2 driver registration */
ps2_npcx_channel_init(const struct device * dev)79 static int ps2_npcx_channel_init(const struct device *dev)
80 {
81 const struct ps2_npcx_ch_config *const config = dev->config;
82 int ret;
83
84 if (!device_is_ready(config->ps2_ctrl)) {
85 LOG_ERR("%s device not ready", config->ps2_ctrl->name);
86 return -ENODEV;
87 }
88
89 /* Configure pin-mux for PS/2 device */
90 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
91 if (ret < 0) {
92 LOG_ERR("PS2 pinctrl setup failed (%d)", ret);
93 return ret;
94 }
95
96 return 0;
97 }
98
99 static DEVICE_API(ps2, ps2_channel_npcx_driver_api) = {
100 .config = ps2_npcx_ch_configure,
101 .read = NULL,
102 .write = ps2_npcx_ch_write,
103 .disable_callback = ps2_npcx_ch_inhibit_interface,
104 .enable_callback = ps2_npcx_ch_enable_interface,
105 };
106
107 /* PS/2 channel initialization macro functions */
108 #define NPCX_PS2_CHANNEL_INIT(inst) \
109 \
110 PINCTRL_DT_INST_DEFINE(inst); \
111 \
112 static const struct ps2_npcx_ch_config ps2_npcx_ch_cfg_##inst = { \
113 .channel_id = DT_INST_PROP(inst, channel), \
114 .ps2_ctrl = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
115 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
116 }; \
117 \
118 DEVICE_DT_INST_DEFINE(inst, ps2_npcx_channel_init, NULL, NULL, \
119 &ps2_npcx_ch_cfg_##inst, POST_KERNEL, \
120 CONFIG_PS2_CHANNEL_INIT_PRIORITY, \
121 &ps2_channel_npcx_driver_api);
122
123 DT_INST_FOREACH_STATUS_OKAY(NPCX_PS2_CHANNEL_INIT)
124
125 /* PS/2 channel driver must be initialized after PS/2 controller driver */
126 BUILD_ASSERT(CONFIG_PS2_CHANNEL_INIT_PRIORITY > CONFIG_PS2_INIT_PRIORITY);
127