| /hal_infineon-latest/XMCLib/drivers/src/ |
| D | xmc_ccu4.c | 779 uint8_t pos; in XMC_CCU4_SLICE_ConfigureEvent() local
857 uint8_t pos; in XMC_CCU4_SLICE_SetInput() local
1077 uint32_t pos; in XMC_CCU4_SLICE_SetInterruptNode() local
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| D | xmc_ccu8.c | 826 uint8_t pos; in XMC_CCU8_SLICE_ConfigureEvent() local
905 uint8_t pos; in XMC_CCU8_SLICE_SetInput() local
1188 uint32_t pos; in XMC_CCU8_SLICE_SetInterruptNode() local
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| D | xmc_vadc.c | 401 uint32_t pos; in XMC_VADC_GLOBAL_BindGroupToEMux() local
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| /hal_infineon-latest/mtb-pdl-cat1/drivers/source/ |
| D | cy_seglcd.c | 71 #define CY_SEGLCD_IS_SYMBOLIC(disp, pos) (CY_SEGLCD_IS_PIXMAP(disp) && \ argument
77 #define CY_SEGLCD_IS_ASCII(disp, pos) (CY_SEGLCD_IS_SYMBOLIC(disp, pos) && \ argument
80 #define CY_SEGLCD_IS_BARGRAPH(disp, pos) (CY_SEGLCD_IS_PIXMAP(disp) && \ argument
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| /hal_infineon-latest/XMCLib/devices/XMC4500/Include/ |
| D | XMC4500.h | 208 #define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ argument
213 #define WR_REG_SIZE(reg, mask, pos, val, size) { \ argument
222 #define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) argument
225 #define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ argument
229 #define SET_BIT(reg, pos) (reg |= ((uint32_t)1<<pos)) argument
232 #define CLR_BIT(reg, pos) (reg = reg & (uint32_t)(~((uint32_t)1<<pos)) ) argument
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| /hal_infineon-latest/XMCLib/devices/XMC4700/Include/ |
| D | XMC4700.h | 208 #define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ argument
213 #define WR_REG_SIZE(reg, mask, pos, val, size) { \ argument
222 #define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) argument
225 #define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ argument
229 #define SET_BIT(reg, pos) (reg |= ((uint32_t)1<<pos)) argument
232 #define CLR_BIT(reg, pos) (reg = reg & (uint32_t)(~((uint32_t)1<<pos)) ) argument
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| /hal_infineon-latest/XMCLib/devices/XMC4800/Include/ |
| D | XMC4800.h | 214 #define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ argument
219 #define WR_REG_SIZE(reg, mask, pos, val, size) { \ argument
228 #define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) argument
231 #define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ argument
235 #define SET_BIT(reg, pos) (reg |= ((uint32_t)1<<pos)) argument
238 #define CLR_BIT(reg, pos) (reg = reg & (uint32_t)(~((uint32_t)1<<pos)) ) argument
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