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Searched defs:pllNum (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysclk_v2.c3918 bool Cy_SysClk_Pll400MIsEnabled(uint32_t pllNum) in Cy_SysClk_Pll400MIsEnabled()
3930 bool Cy_SysClk_Pll400MLocked(uint32_t pllNum) in Cy_SysClk_Pll400MLocked()
3942 bool Cy_SysClk_Pll400MLostLock(uint32_t pllNum) in Cy_SysClk_Pll400MLostLock()
3958 cy_en_sysclk_status_t Cy_SysClk_Pll400MDisable(uint32_t pllNum) in Cy_SysClk_Pll400MDisable()
3982 cy_en_sysclk_status_t Cy_SysClk_Pll400MConfigure(uint32_t pllNum, const cy_stc_pll_config_t *config) in Cy_SysClk_Pll400MConfigure()
4075 cy_en_sysclk_status_t Cy_SysClk_Pll400MManualConfigure(uint32_t pllNum, const cy_stc_pll_manual_con… in Cy_SysClk_Pll400MManualConfigure()
4130 cy_en_sysclk_status_t Cy_SysClk_Pll400MGetConfiguration(uint32_t pllNum, cy_stc_pll_manual_config_t… in Cy_SysClk_Pll400MGetConfiguration()
4168 cy_en_sysclk_status_t Cy_SysClk_Pll400MEnable(uint32_t pllNum, uint32_t timeoutus) in Cy_SysClk_Pll400MEnable()
4217 uint32_t Cy_SysClk_Pll400MGetFrequency(uint32_t pllNum) in Cy_SysClk_Pll400MGetFrequency()
4251 bool Cy_SysClk_Pll200MIsEnabled(uint32_t pllNum) in Cy_SysClk_Pll200MIsEnabled()
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/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h916 #define SRSS_CLK_DPLL_LP_CONFIG(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG) argument
917 #define SRSS_CLK_DPLL_LP_CONFIG2(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG2) argument
918 #define SRSS_CLK_DPLL_LP_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG3) argument
919 #define SRSS_CLK_DPLL_LP_CONFIG4(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG4) argument
920 #define SRSS_CLK_DPLL_LP_CONFIG5(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG5) argument
921 #define SRSS_CLK_DPLL_LP_CONFIG6(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG6) argument
922 #define SRSS_CLK_DPLL_LP_CONFIG7(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG7) argument
923 #define SRSS_CLK_DPLL_LP_STATUS(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].STATUS) argument
1058 #define SRSS_CLK_LP_PLL_CONFIG(pllNum) (((CLK_LP_PLL_Type*) &SRSS->CLK_LP_PLL[pllNum])->PLL28L… argument
1059 #define SRSS_CLK_LP_PLL_CONFIG2(pllNum) (((CLK_LP_PLL_Type*) &SRSS->CLK_LP_PLL[pllNum])->PLL28L… argument
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/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h449 #define SRSS_CLK_PLL_400M_CONFIG(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum]… argument
450 #define SRSS_CLK_PLL_400M_CONFIG2(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum… argument
451 #define SRSS_CLK_PLL_400M_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum… argument
452 #define SRSS_CLK_PLL_400M_STATUS(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum]… argument
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h270 #define SRSS_CLK_PLL_400M_CONFIG(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum]… argument
271 #define SRSS_CLK_PLL_400M_CONFIG2(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum… argument
272 #define SRSS_CLK_PLL_400M_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum… argument
273 #define SRSS_CLK_PLL_400M_STATUS(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum]… argument