1 /* ieee802154_mcxw.h - NXP MCXW 802.15.4 driver */ 2 3 /* 4 * Copyright 2025 NXP 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 9 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_MCXW_H_ 10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_MCXW_H_ 11 12 #include <zephyr/net/ieee802154_radio.h> 13 14 #include "PhyInterface.h" 15 16 #define TX_ENCRYPT_DELAY_SYM 200 17 18 #define DEFAULT_CHANNEL (11) 19 #define DEFAULT_CCA_MODE (gPhyCCAMode1_c) 20 #define IEEE802154_ACK_REQUEST (1 << 5) 21 #define IEEE802154_MIN_LENGTH (5) 22 #define IEEE802154_FRM_CTL_LO_OFFSET (0) 23 #define IEEE802154_DSN_OFFSET (2) 24 #define IEEE802154_FRM_TYPE_MASK (0x7) 25 #define IEEE802154_FRM_TYPE_ACK (0x2) 26 #define IEEE802154_SYMBOL_TIME_US (16) 27 #define IEEE802154_TURNAROUND_LEN_SYM (12) 28 #define IEEE802154_CCA_LEN_SYM (8) 29 #define IEEE802154_PHY_SHR_LEN_SYM (10) 30 #define IEEE802154_IMM_ACK_WAIT_SYM (54) 31 #define IEEE802154_ENH_ACK_WAIT_SYM (90) 32 33 #define NMAX_RXRING_BUFFERS (8) 34 #define RX_ON_IDLE_START (1) 35 #define RX_ON_IDLE_STOP (0) 36 37 #define PHY_TMR_MAX_VALUE (0x00FFFFFF) 38 39 /* The Uncertainty of the scheduling CSL of transmission by the parent, in ±10 us units. */ 40 #define CSL_UNCERT 32 41 42 #define RADIO_SYMBOLS_PER_OCTET (2) 43 44 typedef enum mcxw_radio_state { 45 RADIO_STATE_DISABLED = 0, 46 RADIO_STATE_SLEEP = 1, 47 RADIO_STATE_RECEIVE = 2, 48 RADIO_STATE_TRANSMIT = 3, 49 RADIO_STATE_INVALID = 255, 50 } mcxw_radio_state; 51 52 typedef struct mcxw_rx_frame { 53 uint8_t *psdu; 54 uint8_t length; 55 int8_t rssi; 56 uint8_t lqi; 57 uint32_t timestamp; 58 bool ack_fpb; 59 bool ack_seb; 60 uint64_t time; 61 void *phy_buffer; 62 uint8_t channel; 63 } mcxw_rx_frame; 64 65 typedef struct mcxw_tx_frame { 66 uint8_t *psdu; 67 uint8_t length; 68 uint32_t tx_delay; 69 uint32_t tx_delay_base; 70 bool sec_processed; 71 bool hdr_updated; 72 } mcxw_tx_frame; 73 74 struct mcxw_context { 75 /* Pointer to the network interface. */ 76 struct net_if *iface; 77 /* Pointer to the LPTMR counter device structure*/ 78 const struct device *counter; 79 /* 802.15.4 HW address. */ 80 uint8_t mac[8]; 81 /* RX thread stack. */ 82 K_KERNEL_STACK_MEMBER(rx_stack, CONFIG_IEEE802154_MCXW_RX_STACK_SIZE); 83 /* RX thread control block. */ 84 struct k_thread rx_thread; 85 /* RX message queue */ 86 struct k_msgq rx_msgq; 87 /* RX message queue buffer */ 88 char rx_msgq_buffer[NMAX_RXRING_BUFFERS * sizeof(mcxw_rx_frame)]; 89 /* TX synchronization semaphore */ 90 struct k_sem tx_wait; 91 /* TX synchronization semaphore */ 92 struct k_sem cca_wait; 93 /* Radio state */ 94 mcxw_radio_state state; 95 /* Pan ID */ 96 uint16_t pan_id; 97 /* Channel */ 98 uint8_t channel; 99 /* Maximum energy detected during ED scan */ 100 int8_t max_ed; 101 /* TX power level */ 102 int8_t tx_pwr_lvl; 103 /* Enery detect */ 104 energy_scan_done_cb_t energy_scan_done; 105 /* TX Status */ 106 int tx_status; 107 /* TX frame */ 108 mcxw_tx_frame tx_frame; 109 /* TX data */ 110 uint8_t tx_data[sizeof(macToPdDataMessage_t) + IEEE802154_MAX_PHY_PACKET_SIZE]; 111 /* RX mode */ 112 uint32_t rx_mode; 113 /* RX ACK buffers */ 114 mcxw_rx_frame rx_ack_frame; 115 /* RX ACK data */ 116 uint8_t rx_ack_data[IEEE802154_MAX_PHY_PACKET_SIZE]; 117 /* CSL period */ 118 uint32_t csl_period; 119 /* CSL sample time in microseconds */ 120 uint32_t csl_sample_time; 121 /* PHY context */ 122 uint8_t ot_phy_ctx; 123 }; 124 125 #endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_MCXW_H_ */ 126