1/*
2 * Copyright 2024-2025 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "mimxrt1180_evk-pinctrl.dtsi"
8#include <zephyr/dt-bindings/input/input-event-codes.h>
9
10/ {
11	aliases {
12		led0 = &green_led;
13		sw0 = &user_button;
14		pwm-led0 = &green_pwm_led;
15		sdhc0 = &usdhc1;
16	};
17
18	leds {
19		compatible = "gpio-leds";
20		green_led: led-1 {
21			gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
22			label = "User LED D6";
23		};
24	};
25
26	gpio_keys {
27		compatible = "gpio-keys";
28		user_button: button-1 {
29			label = "User SW8";
30			gpios = <&gpio1 4 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
31			zephyr,code = <INPUT_KEY_0>;
32		};
33	};
34
35	pwmleds {
36		compatible = "pwm-leds";
37		green_pwm_led: green_pwm_led {
38			pwms = <&flexpwm2_pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
39		};
40	};
41};
42
43&emdio {
44	pinctrl-0 = <&emdio_default>;
45	pinctrl-names = "default";
46	status = "okay";
47
48	phy0: phy@2 {
49		compatible = "ethernet-phy";
50		reg = <0x2>;
51		status = "okay";
52	};
53
54	phy1: phy@5 {
55		compatible = "realtek,rtl8211f";
56		reg = <0x5>;
57		status = "okay";
58	};
59
60	phy2: phy@4 {
61		compatible = "realtek,rtl8211f";
62		reg = <0x4>;
63		status = "okay";
64	};
65
66	phy3: phy@7 {
67		compatible = "realtek,rtl8211f";
68		reg = <0x7>;
69		status = "okay";
70	};
71
72	phy4: phy@3 {
73		compatible = "ethernet-phy";
74		reg = <0x3>;
75		status = "okay";
76	};
77};
78
79&enetc_psi0 {
80	local-mac-address = [00 00 00 01 02 00];
81	pinctrl-0 = <&eth4_default>;
82	pinctrl-names = "default";
83	phy-handle = <&phy4>;
84	status = "okay";
85};
86
87/* Internal port */
88&enetc_psi1 {
89	local-mac-address = [00 00 00 01 03 00];
90	status = "okay";
91};
92
93&switch {
94	status = "okay";
95};
96
97&switch_port0 {
98	local-mac-address = [00 00 00 01 04 00];
99	pinctrl-0 = <&eth0_default>;
100	pinctrl-names = "default";
101	phy-handle = <&phy0>;
102	phy-connection-type = "rmii";
103	status = "okay";
104};
105
106&switch_port1 {
107	local-mac-address = [00 00 00 01 05 00];
108	pinctrl-0 = <&eth1_default>;
109	pinctrl-names = "default";
110	phy-handle = <&phy1>;
111	phy-connection-type = "rgmii";
112	status = "okay";
113};
114
115&switch_port2 {
116	local-mac-address = [00 00 00 01 06 00];
117	pinctrl-0 = <&eth2_default>;
118	pinctrl-names = "default";
119	phy-handle = <&phy2>;
120	phy-connection-type = "rgmii";
121	status = "okay";
122};
123
124&switch_port3 {
125	local-mac-address = [00 00 00 01 07 00];
126	pinctrl-0 = <&eth3_default>;
127	pinctrl-names = "default";
128	phy-handle = <&phy3>;
129	phy-connection-type = "rgmii";
130	status = "okay";
131};
132
133/* Internal port */
134&switch_port4 {
135	local-mac-address = [00 00 00 01 06 00];
136	status = "okay";
137};
138
139&lpuart1 {
140	status = "okay";
141	current-speed = <115200>;
142	pinctrl-0 = <&pinmux_lpuart1>;
143	pinctrl-1 = <&pinmux_lpuart1_sleep>;
144	pinctrl-names = "default", "sleep";
145};
146
147&lpuart12 {
148	status = "okay";
149	current-speed = <115200>;
150	pinctrl-0 = <&pinmux_lpuart12>;
151	pinctrl-1 = <&pinmux_lpuart12_sleep>;
152	pinctrl-names = "default", "sleep";
153};
154
155&lpuart3 {
156	pinctrl-0 = <&pinmux_lpuart3>;
157	pinctrl-1 = <&pinmux_lpuart3_sleep>;
158	pinctrl-names = "default", "sleep";
159};
160
161&user_button {
162	status = "okay";
163};
164
165&green_led {
166	status = "okay";
167};
168
169&gpio1 {
170	status = "okay";
171};
172
173&gpio4 {
174	status = "okay";
175};
176
177&flexspi {
178	pinctrl-0 = <&pinmux_flexspi1>;
179	pinctrl-names = "default";
180};
181
182&flexspi {
183	status = "okay";
184	ahb-prefetch;
185	ahb-read-addr-opt;
186	rx-clock-source = <1>;
187	w25q128jw: w25q128jw@0 {
188		compatible = "nxp,imx-flexspi-nor";
189		size = <DT_SIZE_M(16*8)>;
190		reg = <0>;
191		spi-max-frequency = <133000000>;
192		status = "okay";
193		jedec-id = [ef 60 18];
194		erase-block-size = <4096>;
195		write-block-size = <1>;
196
197		partitions {
198			compatible = "fixed-partitions";
199			#address-cells = <1>;
200			#size-cells = <1>;
201
202			boot_partition: partition@0 {
203				label = "mcuboot";
204				reg = <0x00000000 DT_SIZE_K(128)>;
205			};
206			/* The MCUBoot swap-move algorithm uses the last 3 sectors
207			 * of the primary slot0 for swap status and move.
208			 */
209			slot0_partition: partition@20000 {
210				label = "image-0";
211				reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
212			};
213			slot1_partition: partition@723000 {
214				label = "image-1";
215				reg = <0x00723000 DT_SIZE_M(7)>;
216			};
217			storage_partition: partition@E23000 {
218				label = "storage";
219				reg = <0x00E23000 (DT_SIZE_M(2) - DT_SIZE_K(140))>;
220			};
221		};
222	};
223};
224
225&lpi2c2 {
226	pinctrl-0 = <&pinmux_lpi2c2>;
227	pinctrl-names = "default";
228};
229
230&lpi2c3 {
231	pinctrl-0 = <&pinmux_lpi2c3>;
232	pinctrl-names = "default";
233};
234
235&lpadc1 {
236	pinctrl-0 = <&pinmux_lpadc1>;
237	pinctrl-names = "default";
238};
239
240&flexcan3 {
241	pinctrl-0 = <&pinmux_flexcan3>;
242	pinctrl-names = "default";
243	can-transceiver {
244		max-bitrate = <5000000>;
245	};
246};
247
248&flexpwm2_pwm1 {
249	status = "okay";
250	pinctrl-0 = <&pinmux_flexpwm2>;
251	pinctrl-names = "default";
252};
253
254&tpm5 {
255	pinctrl-0 = <&pinmux_tpm5>;
256	pinctrl-names = "default";
257};
258
259&i3c2 {
260	pinctrl-0 = <&pinmux_i3c2>;
261	pinctrl-names = "default";
262};
263
264p3t1755dp_ard_i3c_interface: &i3c2 {};
265p3t1755dp_ard_i2c_interface: &lpi2c2 {};
266
267&lpspi3 {
268	dmas = <&edma4 1 13>, <&edma4 2 12>;
269	dma-names = "rx", "tx";
270	pinctrl-0 = <&pinmux_lpspi3>;
271	pinctrl-names = "default";
272};
273
274&usdhc1 {
275	status = "okay";
276	detect-dat3;
277	no-1-8-v;
278	pwr-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
279	pinctrl-0 = <&pinmux_usdhc1>;
280	pinctrl-1 = <&pinmux_usdhc1_dat3_nopull>;
281	pinctrl-names = "default", "nopull";
282	sdmmc {
283		compatible = "zephyr,sdmmc-disk";
284		disk-name = "SD";
285		status = "okay";
286	};
287};
288