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Searched defs:op1 (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.5.0/include/zephyr/arch/arm/cortex_a_r/
Dlib_helpers.h17 #define read_sysreg32(op1, CRn, CRm, op2) \ argument
25 #define write_sysreg32(val, op1, CRn, CRm, op2) \ argument
31 #define read_sysreg64(op1, CRm) \ argument
39 #define write_sysreg64(val, op1, CRm) \ argument
45 #define MAKE_REG_HELPER(reg, op1, CRn, CRm, op2) \ argument
55 #define MAKE_REG64_HELPER(reg, op1, CRm) \ argument
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/
Dsoc_espi_saf_v1.h132 #define MCHP_SAF_OPCODE_REG_VAL(op0, op1, op2, op3) \ argument
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/
Dsoc_espi_saf_v2.h156 #define MCHP_SAF_OPCODE_REG_VAL(op0, op1, op2, op3) \ argument
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt/
Dflexspi_nor_config.h65 #define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ argument