1/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/xtensa.dtsi>
8#include <freq.h>
9#include <mem.h>
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		cpu0: cpu@0 {
17			device_type = "cpu";
18			compatible = "cdns,tensilica-xtensa-lx7";
19			clock-frequency = <DT_FREQ_M(250)>;
20			reg = <0>;
21		};
22	};
23
24	itcm0: memory@580000 {
25		device_type = "memory";
26		compatible = "mmio-sram";
27		reg = <0x580000 DT_SIZE_K(32)>;
28	};
29
30	itcm1: memory@680000 {
31		device_type = "memory";
32		compatible = "mmio-sram";
33		reg = <0x680000 DT_SIZE_K(512)>;
34	};
35
36	dtcm: memory@20700000 {
37		device_type = "memory";
38		compatible = "mmio-sram";
39		reg = <0x20700000 DT_SIZE_K(512)>;
40	};
41};
42