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/Zephyr-latest/drivers/dma/
Ddma_stm32_v2.c18 uint32_t dma_stm32_id_to_stream(uint32_t id) in dma_stm32_id_to_stream()
44 void dma_stm32_clear_ht(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_ht()
70 void dma_stm32_clear_tc(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_tc()
96 bool dma_stm32_is_ht_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_ht_active()
122 bool dma_stm32_is_tc_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_tc_active()
149 void dma_stm32_clear_te(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_te()
175 void dma_stm32_clear_gi(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_gi()
201 bool dma_stm32_is_te_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_te_active()
227 bool dma_stm32_is_gi_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_gi_active()
253 void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, uint32_t id) in stm32_dma_dump_stream_irq()
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Ddma_stm32_v1.c20 uint32_t dma_stm32_id_to_stream(uint32_t id) in dma_stm32_id_to_stream()
58 void dma_stm32_clear_ht(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_ht()
76 void dma_stm32_clear_tc(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_tc()
94 bool dma_stm32_is_ht_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_ht_active()
112 bool dma_stm32_is_tc_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_tc_active()
130 void dma_stm32_clear_te(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_te()
148 void dma_stm32_clear_dme(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_dme()
166 void dma_stm32_clear_fe(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_fe()
184 bool dma_stm32_is_te_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_te_active()
202 bool dma_stm32_is_dme_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_dme_active()
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Ddma_stm32u5.c46 static void dma_stm32_dump_stream_irq(const struct device *dev, uint32_t id) in dma_stm32_dump_stream_irq()
54 static void dma_stm32_clear_stream_irq(const struct device *dev, uint32_t id) in dma_stm32_clear_stream_irq()
65 uint32_t dma_stm32_id_to_stream(uint32_t id) in dma_stm32_id_to_stream()
91 bool dma_stm32_is_tc_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_tc_active()
96 void dma_stm32_clear_tc(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_tc()
102 static inline bool dma_stm32_is_dte_active(DMA_TypeDef *dma, uint32_t id) in dma_stm32_is_dte_active()
108 static inline bool dma_stm32_is_ule_active(DMA_TypeDef *dma, uint32_t id) in dma_stm32_is_ule_active()
114 static inline bool dma_stm32_is_use_active(DMA_TypeDef *dma, uint32_t id) in dma_stm32_is_use_active()
120 bool dma_stm32_is_te_active(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_is_te_active()
129 void dma_stm32_clear_te(DMA_TypeDef *DMAx, uint32_t id) in dma_stm32_clear_te()
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Ddma_stm32_bdma.c38 uint32_t bdma_stm32_id_to_channel(uint32_t id) in bdma_stm32_id_to_channel()
76 void bdma_stm32_clear_ht(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_clear_ht()
94 void bdma_stm32_clear_tc(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_clear_tc()
112 bool bdma_stm32_is_ht_active(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_is_ht_active()
130 bool bdma_stm32_is_tc_active(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_is_tc_active()
148 void bdma_stm32_clear_te(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_clear_te()
166 void bdma_stm32_clear_gi(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_clear_gi()
184 bool bdma_stm32_is_te_active(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_is_te_active()
202 bool bdma_stm32_is_gi_active(BDMA_TypeDef *DMAx, uint32_t id) in bdma_stm32_is_gi_active()
220 void stm32_bdma_dump_channel_irq(BDMA_TypeDef *dma, uint32_t id) in stm32_bdma_dump_channel_irq()
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/Zephyr-latest/scripts/build/
Duf2families.json3 "id": "0x16573617", string
8 "id": "0x1851780a", string
13 "id": "0x1b57745f", string
18 "id": "0x1c5f21b0", string
23 "id": "0x1e1f432d", string
28 "id": "0x202e3a91", string
33 "id": "0x21460ff0", string
38 "id": "0x2abc77ec", string
43 "id": "0x300f5633", string
48 "id": "0x31d228c6", string
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/Zephyr-latest/drivers/reset/
Dreset_nxp_rstctl.c15 #define NXP_RSTCTL_OFFSET(id) ((id >> 16) * sizeof(uint32_t)) argument
16 #define NXP_RSTCTL_BIT(id) (BIT(id & 0xFFFF)) argument
17 #define NXP_RSTCTL_CTL(id) (NXP_RSTCTL_OFFSET(id) + 0x10) argument
18 #define NXP_RSTCTL_SET(id) (NXP_RSTCTL_OFFSET(id) + 0x40) argument
19 #define NXP_RSTCTL_CLR(id) (NXP_RSTCTL_OFFSET(id) + 0x70) argument
21 static int reset_nxp_rstctl_status(const struct device *dev, uint32_t id, uint8_t *status) in reset_nxp_rstctl_status()
32 static int reset_nxp_rstctl_line_assert(const struct device *dev, uint32_t id) in reset_nxp_rstctl_line_assert()
42 static int reset_nxp_rstctl_line_deassert(const struct device *dev, uint32_t id) in reset_nxp_rstctl_line_deassert()
52 static int reset_nxp_rstctl_line_toggle(const struct device *dev, uint32_t id) in reset_nxp_rstctl_line_toggle()
Dreset_lpc_syscon.c15 #define LPC_RESET_OFFSET(id) (id >> 16) argument
16 #define LPC_RESET_BIT(id) (BIT(id & 0xFFFF)) argument
18 static int reset_nxp_syscon_status(const struct device *dev, uint32_t id, uint8_t *status) in reset_nxp_syscon_status()
26 static int reset_nxp_syscon_line_assert(const struct device *dev, uint32_t id) in reset_nxp_syscon_line_assert()
33 static int reset_nxp_syscon_line_deassert(const struct device *dev, uint32_t id) in reset_nxp_syscon_line_deassert()
40 static int reset_nxp_syscon_line_toggle(const struct device *dev, uint32_t id) in reset_nxp_syscon_line_toggle()
Dreset_stm32.c14 #define STM32_RESET_CLR_OFFSET(id) (((id) >> 17U) & 0xFFFU) argument
15 #define STM32_RESET_SET_OFFSET(id) (((id) >> 5U) & 0xFFFU) argument
16 #define STM32_RESET_REG_BIT(id) ((id)&0x1FU) argument
22 static int reset_stm32_status(const struct device *dev, uint32_t id, in reset_stm32_status()
33 static int reset_stm32_line_assert(const struct device *dev, uint32_t id) in reset_stm32_line_assert()
43 static int reset_stm32_line_deassert(const struct device *dev, uint32_t id) in reset_stm32_line_deassert()
58 static int reset_stm32_line_toggle(const struct device *dev, uint32_t id) in reset_stm32_line_toggle()
Dreset_gd32.c15 #define GD32_RESET_ID_OFFSET(id) (((id) >> 6U) & 0xFFU) argument
17 #define GD32_RESET_ID_BIT(id) ((id) & 0x1FU) argument
23 static int reset_gd32_status(const struct device *dev, uint32_t id, in reset_gd32_status()
34 static int reset_gd32_line_assert(const struct device *dev, uint32_t id) in reset_gd32_line_assert()
44 static int reset_gd32_line_deassert(const struct device *dev, uint32_t id) in reset_gd32_line_deassert()
54 static int reset_gd32_line_toggle(const struct device *dev, uint32_t id) in reset_gd32_line_toggle()
Dreset_numaker.c16 #define NUMAKER_RESET_IP_OFFSET(id) (NUMAKER_RESET_IPRST0_OFFSET + (((id) >> 24UL) & 0xffUL)) argument
18 #define NUMAKER_RESET_IP_BIT(id) (id & 0x00ffffffUL) argument
24 static int reset_numaker_status(const struct device *dev, uint32_t id, uint8_t *status) in reset_numaker_status()
34 static int reset_numaker_line_assert(const struct device *dev, uint32_t id) in reset_numaker_line_assert()
44 static int reset_numaker_line_deassert(const struct device *dev, uint32_t id) in reset_numaker_line_deassert()
54 static int reset_numaker_line_toggle(const struct device *dev, uint32_t id) in reset_numaker_line_toggle()
Dreset_intel_socfpga.c26 static int32_t reset_intel_soc_status(const struct device *dev, uint32_t id, uint8_t *status) in reset_intel_soc_status()
41 static void reset_intel_soc_update(const struct device *dev, uint32_t id, bool assert) in reset_intel_soc_update()
62 static int32_t reset_intel_soc_line_assert(const struct device *dev, uint32_t id) in reset_intel_soc_line_assert()
69 static int32_t reset_intel_soc_line_deassert(const struct device *dev, uint32_t id) in reset_intel_soc_line_deassert()
76 static int32_t reset_intel_soc_line_toggle(const struct device *dev, uint32_t id) in reset_intel_soc_line_toggle()
/Zephyr-latest/soc/atmel/sam/common/
Dsoc_pmc.c19 void soc_pmc_peripheral_enable(uint32_t id) in soc_pmc_peripheral_enable()
36 void soc_pmc_peripheral_disable(uint32_t id) in soc_pmc_peripheral_disable()
53 uint32_t soc_pmc_peripheral_is_enabled(uint32_t id) in soc_pmc_peripheral_is_enabled()
/Zephyr-latest/include/zephyr/app_memory/
Dapp_memdomain.h30 #define K_APP_DMEM_SECTION(id) data_smem_##id##_data argument
40 #define K_APP_BMEM_SECTION(id) data_smem_##id##_bss argument
51 #define K_APP_DMEM(id) Z_GENERIC_SECTION(K_APP_DMEM_SECTION(id)) argument
61 #define K_APP_BMEM(id) Z_GENERIC_SECTION(K_APP_BMEM_SECTION(id)) argument
68 #define Z_APP_START(id) z_data_smem_##id##_part_start argument
69 #define Z_APP_SIZE(id) z_data_smem_##id##_part_size argument
70 #define Z_APP_BSS_START(id) z_data_smem_##id##_bss_start argument
71 #define Z_APP_BSS_SIZE(id) z_data_smem_##id##_bss_size argument
/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_stm32.h35 #define STM32_DMA_SLOT(id, dir, slot) 0 argument
36 #define STM32_DMA_SLOT_BY_IDX(id, idx, slot) 0 argument
38 #define STM32_DMA_SLOT(id, dir, slot) DT_INST_DMAS_CELL_BY_NAME(id, dir, slot) argument
39 #define STM32_DMA_SLOT_BY_IDX(id, idx, slot) DT_INST_DMAS_CELL_BY_IDX(id, idx, slot) argument
45 #define STM32_DMA_FEATURES(id, dir) 0 argument
47 #define STM32_DMA_FEATURES(id, dir) \ argument
51 #define STM32_DMA_CTLR(id, dir) \ argument
53 #define STM32_DMA_CHANNEL_CONFIG(id, dir) \ argument
55 #define STM32_DMA_CHANNEL_CONFIG_BY_IDX(id, idx) \ argument
/Zephyr-latest/drivers/hwspinlock/
Dhwspinlock_handlers.c10 static inline int z_vrfy_hwspinlock_trylock(const struct device *dev, uint32_t id) in z_vrfy_hwspinlock_trylock()
18 static inline void z_vrfy_hwspinlock_lock(const struct device *dev, uint32_t id) in z_vrfy_hwspinlock_lock()
26 static inline void z_vrfy_hwspinlock_unlock(const struct device *dev, uint32_t id) in z_vrfy_hwspinlock_unlock()
/Zephyr-latest/drivers/clock_control/
Dclock_control_gd32.c20 #define GD32_CLOCK_ID_OFFSET(id) (((id) >> 6U) & 0xFFU) argument
22 #define GD32_CLOCK_ID_BIT(id) ((id)&0x1FU) argument
74 uint16_t id = *(uint16_t *)sys; in clock_control_gd32_on() local
86 uint16_t id = *(uint16_t *)sys; in clock_control_gd32_off() local
99 uint16_t id = *(uint16_t *)sys; in clock_control_gd32_get_rate() local
191 uint16_t id = *(uint16_t *)sys; in clock_control_gd32_get_status() local
/Zephyr-latest/doc/hardware/peripherals/sensor/
Dmultiple_temp_polling.c12 #define TEMP_ALIAS(id) DT_ALIAS(CONCAT(temp, id)) argument
13 #define TEMP_IODEV_SYM(id) CONCAT(temp_iodev, id) argument
14 #define TEMP_IODEV_PTR(id) &TEMP_IODEV_SYM(id) argument
15 #define TEMP_DEFINE_IODEV(id) \ argument
Daccel_stream.c12 #define ACCEL_ALIAS(id) DT_ALIAS(CONCAT(accel, id)) argument
13 #define ACCEL_IODEV_SYM(id) CONCAT(accel_iodev, id) argument
14 #define ACCEL_IODEV_PTR(id) &ACCEL_IODEV_SYM(id) argument
15 #define ACCEL_DEFINE_IODEV(id) \ argument
/Zephyr-latest/tests/bluetooth/host/id/bt_lookup_id_addr/src/
Dmain.c48 uint8_t id = 0x00; in ZTEST() local
76 uint8_t id = 0x00; in ZTEST() local
91 static struct bt_keys *bt_keys_find_irk_custom_fake(uint8_t id, const bt_addr_le_t *addr) in bt_keys_find_irk_custom_fake()
111 uint8_t id = 0x00; in ZTEST() local
/Zephyr-latest/soc/nxp/lpc/lpc55xxx/
Dpower.c10 void pm_state_set(enum pm_state state, uint8_t id) in pm_state_set()
24 void pm_state_exit_post_ops(enum pm_state state, uint8_t id) in pm_state_exit_post_ops()
/Zephyr-latest/subsys/sip_svc/
Dsip_svc_id_mgr.c83 uint32_t id; in sip_svc_id_mgr_alloc() local
116 void sip_svc_id_mgr_free(struct sip_svc_id_pool *id_pool, uint32_t id) in sip_svc_id_mgr_free()
199 static int sip_svc_id_map_get_idx(struct sip_svc_id_map *id_map, uint32_t id) in sip_svc_id_map_get_idx()
217 int sip_svc_id_map_insert_item(struct sip_svc_id_map *id_map, uint32_t id, void *arg1, void *arg2, in sip_svc_id_map_insert_item()
243 int sip_svc_id_map_remove_item(struct sip_svc_id_map *id_map, uint32_t id) in sip_svc_id_map_remove_item()
268 struct sip_svc_id_map_item *sip_svc_id_map_query_item(struct sip_svc_id_map *id_map, uint32_t id) in sip_svc_id_map_query_item()
/Zephyr-latest/scripts/gitlint/
Dzephyr_commit_rules.py25 id = "UC6" variable in BodyMinLineCount
43 id = "UC1" variable in BodyMaxLineCount
64 id = "UC2" variable in SignedOffBy
79 id = "UC5" variable in TitleMaxLengthRevert
91 id = "UC3" variable in TitleStartsWithSubsystem
104 id = "UC4" variable in MaxLineLengthExceptions
123 id = "UC7" variable in BodyContainsBlockedTags
/Zephyr-latest/drivers/i2c/
Di2c_nrfx_twis.c19 #define SHIM_NRF_TWIS_NODE(id) \ argument
22 #define SHIM_NRF_TWIS_DEVICE_GET(id) \ argument
25 #define SHIM_NRF_TWIS_IRQ_HANDLER(id) \ argument
28 #define SHIM_NRF_TWIS_IRQN(id) \ argument
31 #define SHIM_NRF_TWIS_IRQ_PRIO(id) \ argument
34 #define SHIM_NRF_TWIS_HAS_MEMORY_REGIONS(id) \ argument
37 #define SHIM_NRF_TWIS_LINKER_REGION_NAME(id) \ argument
40 #define SHIM_NRF_TWIS_BUF_ATTR_SECTION(id) \ argument
43 #define SHIM_NRF_TWIS_BUF_ATTR(id) \ argument
286 #define SHIM_NRF_TWIS_NAME(id, name) \ argument
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/Zephyr-latest/samples/subsys/portability/cmsis_rtos_v1/philosophers/src/
Dmain.c90 static void set_phil_state_pos(int id) in set_phil_state_pos()
98 static void print_phil_state(int id, const char *fmt, int32_t delay) in print_phil_state()
123 static int32_t get_random_delay(int id, int period_in_ms) in get_random_delay()
138 static inline int is_last_philosopher(int id) in is_last_philosopher()
143 void philosopher(void const *id) in philosopher()
195 osThreadId id; in start_threads() local
/Zephyr-latest/subsys/net/l2/ppp/
Dfsm.c373 enum ppp_packet_type type, uint8_t id, in ppp_send_pkt()
561 uint8_t id, in fsm_recv_configure_req()
681 static enum net_verdict fsm_recv_configure_ack(struct ppp_fsm *fsm, uint8_t id, in fsm_recv_configure_ack()
750 uint8_t id, in fsm_recv_configure_nack_rej()
849 static enum net_verdict fsm_recv_terminate_req(struct ppp_fsm *fsm, uint8_t id, in fsm_recv_terminate_req()
896 static enum net_verdict fsm_recv_terminate_ack(struct ppp_fsm *fsm, uint8_t id, in fsm_recv_terminate_ack()
947 uint8_t code, id; in fsm_recv_code_rej() local
1030 uint8_t code, id; in ppp_fsm_input() local
1115 uint8_t id, in ppp_fsm_recv_protocol_rej()
1125 uint8_t id, in ppp_fsm_recv_echo_req()
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