1/* 2 * Copyright (c) 2024 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <mem.h> 8#include <nordic/nrf_common.dtsi> 9#include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h> 10#include <zephyr/dt-bindings/regulator/nrf5x.h> 11 12/delete-node/ &sw_pwm; 13 14/ { 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 cpus { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 22 cpuapp: cpu@0 { 23 compatible = "arm,cortex-m33f"; 24 reg = <0>; 25 device_type = "cpu"; 26 clock-frequency = <DT_FREQ_M(128)>; 27 #address-cells = <1>; 28 #size-cells = <1>; 29 itm: itm@e0000000 { 30 compatible = "arm,armv8m-itm"; 31 reg = <0xe0000000 0x1000>; 32 swo-ref-frequency = <DT_FREQ_M(128)>; 33 }; 34 }; 35 }; 36 37 clocks { 38 lfxo: lfxo { 39 compatible = "nordic,nrf-lfxo"; 40 #clock-cells = <0>; 41 clock-frequency = <32768>; 42 }; 43 44 hfxo: hfxo { 45 compatible = "nordic,nrf-hfxo"; 46 #clock-cells = <0>; 47 clock-frequency = <DT_FREQ_M(32)>; 48 }; 49 50 hfpll: hfpll { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <DT_FREQ_M(128)>; 54 }; 55 }; 56 57 soc { 58 #address-cells = <1>; 59 #size-cells = <1>; 60 61 ficr: ficr@ffc000 { 62 compatible = "nordic,nrf-ficr"; 63 reg = <0xffc000 0x1000>; 64 #nordic,ficr-cells = <1>; 65 }; 66 67 uicr: uicr@ffd000 { 68 compatible = "nordic,nrf-uicr"; 69 reg = <0xffd000 0x1000>; 70 }; 71 72 cpuapp_sram: memory@20000000 { 73 compatible = "mmio-sram"; 74 reg = <0x20000000 DT_SIZE_K(511)>; 75 #address-cells = <1>; 76 #size-cells = <1>; 77 ranges = <0x0 0x20000000 0x7fc00>; 78 }; 79 80 global_peripherals: peripheral@50000000 { 81 ranges = <0x0 0x50000000 0x10000000>; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 85 dppic00: dppic@42000 { 86 compatible = "nordic,nrf-dppic"; 87 reg = <0x42000 0x808>; 88 status = "disabled"; 89 }; 90 91 ppib00: ppib@44000 { 92 compatible = "nordic,nrf-ppib"; 93 reg = <0x44000 0x1000>; 94 status = "disabled"; 95 }; 96 97 ppib01: ppib@45000 { 98 compatible = "nordic,nrf-ppib"; 99 reg = <0x45000 0x1000>; 100 status = "disabled"; 101 }; 102 103 spi00: spi@4d000 { 104 /* 105 * This spi node can be either SPIM or SPIS, 106 * for the user to pick: 107 * compatible = "nordic,nrf-spim" or 108 * "nordic,nrf-spis". 109 */ 110 compatible = "nordic,nrf-spim"; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 reg = <0x4d000 0x1000>; 114 interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>; 115 max-frequency = <DT_FREQ_M(32)>; 116 easydma-maxcnt-bits = <16>; 117 rx-delay-supported; 118 rx-delay = <1>; 119 status = "disabled"; 120 }; 121 122 uart00: uart@4d000 { 123 compatible = "nordic,nrf-uarte"; 124 reg = <0x4d000 0x1000>; 125 interrupts = <77 NRF_DEFAULT_IRQ_PRIORITY>; 126 clocks = <&hfpll>; 127 status = "disabled"; 128 endtx-stoptx-supported; 129 frame-timeout-supported; 130 }; 131 132 gpio2: gpio@50400 { 133 compatible = "nordic,nrf-gpio"; 134 gpio-controller; 135 reg = <0x50400 0x300>; 136 #gpio-cells = <2>; 137 ngpios = <11>; 138 status = "disabled"; 139 port = <2>; 140 }; 141 142 timer00: timer@55000 { 143 compatible = "nordic,nrf-timer"; 144 status = "disabled"; 145 reg = <0x55000 0x1000>; 146 cc-num = <6>; 147 max-bit-width = <32>; 148 interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; 149 /* NRFX-6881: Temporary workaround for timer00 */ 150 max-frequency = <DT_FREQ_M(64)>; 151 prescaler = <0>; 152 }; 153 154 dppic10: dppic@82000 { 155 compatible = "nordic,nrf-dppic"; 156 reg = <0x82000 0x808>; 157 status = "disabled"; 158 }; 159 160 ppib10: ppib@83000 { 161 compatible = "nordic,nrf-ppib"; 162 reg = <0x83000 0x1000>; 163 status = "disabled"; 164 }; 165 166 ppib11: ppib@84000 { 167 compatible = "nordic,nrf-ppib"; 168 reg = <0x84000 0x1000>; 169 status = "disabled"; 170 }; 171 172 timer10: timer@85000 { 173 compatible = "nordic,nrf-timer"; 174 status = "disabled"; 175 reg = <0x85000 0x1000>; 176 cc-num = <8>; 177 max-bit-width = <32>; 178 interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; 179 max-frequency = <DT_FREQ_M(32)>; 180 prescaler = <0>; 181 }; 182 183 egu10: egu@87000 { 184 compatible = "nordic,nrf-egu"; 185 reg = <0x87000 0x1000>; 186 interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; 187 status = "disabled"; 188 }; 189 190 radio: radio@8a000 { 191 compatible = "nordic,nrf-radio"; 192 reg = <0x8a000 0x1000>; 193 interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; 194 status = "disabled"; 195 dfe-supported; 196 ieee802154-supported; 197 ble-2mbps-supported; 198 ble-coded-phy-supported; 199 200 ieee802154: ieee802154 { 201 compatible = "nordic,nrf-ieee802154"; 202 status = "disabled"; 203 }; 204 205 /* Note: In the nRF Connect SDK the SoftDevice Controller 206 * is added and set as the default Bluetooth Controller. 207 */ 208 bt_hci_controller: bt_hci_controller { 209 compatible = "zephyr,bt-hci-ll-sw-split"; 210 status = "disabled"; 211 }; 212 }; 213 214 dppic20: dppic@c2000 { 215 compatible = "nordic,nrf-dppic"; 216 reg = <0xc2000 0x808>; 217 status = "disabled"; 218 }; 219 220 ppib20: ppib@c3000 { 221 compatible = "nordic,nrf-ppib"; 222 reg = <0xc3000 0x1000>; 223 status = "disabled"; 224 }; 225 226 ppib21: ppib@c4000 { 227 compatible = "nordic,nrf-ppib"; 228 reg = <0xc4000 0x1000>; 229 status = "disabled"; 230 }; 231 232 ppib22: ppib@c5000 { 233 compatible = "nordic,nrf-ppib"; 234 reg = <0xc5000 0x1000>; 235 status = "disabled"; 236 }; 237 238 i2c20: i2c@c6000 { 239 compatible = "nordic,nrf-twim"; 240 #address-cells = <1>; 241 #size-cells = <0>; 242 reg = <0xc6000 0x1000>; 243 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 244 easydma-maxcnt-bits = <16>; 245 status = "disabled"; 246 zephyr,pm-device-runtime-auto; 247 }; 248 249 spi20: spi@c6000 { 250 /* 251 * This spi node can be either SPIM or SPIS, 252 * for the user to pick: 253 * compatible = "nordic,nrf-spim" or 254 * "nordic,nrf-spis". 255 */ 256 compatible = "nordic,nrf-spim"; 257 #address-cells = <1>; 258 #size-cells = <0>; 259 reg = <0xc6000 0x1000>; 260 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 261 max-frequency = <DT_FREQ_M(8)>; 262 easydma-maxcnt-bits = <16>; 263 rx-delay-supported; 264 rx-delay = <1>; 265 status = "disabled"; 266 }; 267 268 uart20: uart@c6000 { 269 compatible = "nordic,nrf-uarte"; 270 reg = <0xc6000 0x1000>; 271 interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; 272 status = "disabled"; 273 endtx-stoptx-supported; 274 frame-timeout-supported; 275 }; 276 277 i2c21: i2c@c7000 { 278 compatible = "nordic,nrf-twim"; 279 #address-cells = <1>; 280 #size-cells = <0>; 281 reg = <0xc7000 0x1000>; 282 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 283 easydma-maxcnt-bits = <16>; 284 status = "disabled"; 285 zephyr,pm-device-runtime-auto; 286 }; 287 288 spi21: spi@c7000 { 289 /* 290 * This spi node can be either SPIM or SPIS, 291 * for the user to pick: 292 * compatible = "nordic,nrf-spim" or 293 * "nordic,nrf-spis". 294 */ 295 compatible = "nordic,nrf-spim"; 296 #address-cells = <1>; 297 #size-cells = <0>; 298 reg = <0xc7000 0x1000>; 299 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 300 max-frequency = <DT_FREQ_M(8)>; 301 easydma-maxcnt-bits = <16>; 302 rx-delay-supported; 303 rx-delay = <1>; 304 status = "disabled"; 305 }; 306 307 uart21: uart@c7000 { 308 compatible = "nordic,nrf-uarte"; 309 reg = <0xc7000 0x1000>; 310 interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; 311 status = "disabled"; 312 endtx-stoptx-supported; 313 frame-timeout-supported; 314 }; 315 316 i2c22: i2c@c8000 { 317 compatible = "nordic,nrf-twim"; 318 #address-cells = <1>; 319 #size-cells = <0>; 320 reg = <0xc8000 0x1000>; 321 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 322 easydma-maxcnt-bits = <16>; 323 status = "disabled"; 324 zephyr,pm-device-runtime-auto; 325 }; 326 327 spi22: spi@c8000 { 328 /* 329 * This spi node can be either SPIM or SPIS, 330 * for the user to pick: 331 * compatible = "nordic,nrf-spim" or 332 * "nordic,nrf-spis". 333 */ 334 compatible = "nordic,nrf-spim"; 335 #address-cells = <1>; 336 #size-cells = <0>; 337 reg = <0xc8000 0x1000>; 338 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 339 max-frequency = <DT_FREQ_M(8)>; 340 easydma-maxcnt-bits = <16>; 341 rx-delay-supported; 342 rx-delay = <1>; 343 status = "disabled"; 344 }; 345 346 uart22: uart@c8000 { 347 compatible = "nordic,nrf-uarte"; 348 reg = <0xc8000 0x1000>; 349 interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; 350 status = "disabled"; 351 endtx-stoptx-supported; 352 frame-timeout-supported; 353 }; 354 355 egu20: egu@c9000 { 356 compatible = "nordic,nrf-egu"; 357 reg = <0xc9000 0x1000>; 358 interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; 359 status = "disabled"; 360 }; 361 362 timer20: timer@ca000 { 363 compatible = "nordic,nrf-timer"; 364 status = "disabled"; 365 reg = <0xca000 0x1000>; 366 cc-num = <6>; 367 max-bit-width = <32>; 368 interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; 369 prescaler = <0>; 370 }; 371 372 timer21: timer@cb000 { 373 compatible = "nordic,nrf-timer"; 374 status = "disabled"; 375 reg = <0xcb000 0x1000>; 376 cc-num = <6>; 377 max-bit-width = <32>; 378 interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; 379 prescaler = <0>; 380 }; 381 382 timer22: timer@cc000 { 383 compatible = "nordic,nrf-timer"; 384 status = "disabled"; 385 reg = <0xcc000 0x1000>; 386 cc-num = <6>; 387 max-bit-width = <32>; 388 interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; 389 prescaler = <0>; 390 }; 391 392 timer23: timer@cd000 { 393 compatible = "nordic,nrf-timer"; 394 status = "disabled"; 395 reg = <0xcd000 0x1000>; 396 cc-num = <6>; 397 max-bit-width = <32>; 398 interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; 399 prescaler = <0>; 400 }; 401 402 timer24: timer@ce000 { 403 compatible = "nordic,nrf-timer"; 404 status = "disabled"; 405 reg = <0xce000 0x1000>; 406 cc-num = <6>; 407 max-bit-width = <32>; 408 interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; 409 prescaler = <0>; 410 }; 411 412 pdm20: pdm@d0000 { 413 compatible = "nordic,nrf-pdm"; 414 status = "disabled"; 415 reg = <0xd0000 0x1000>; 416 interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; 417 }; 418 419 pdm21: pdm@d1000 { 420 compatible = "nordic,nrf-pdm"; 421 status = "disabled"; 422 reg = <0xd1000 0x1000>; 423 interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; 424 }; 425 426 pwm20: pwm@d2000 { 427 compatible = "nordic,nrf-pwm"; 428 status = "disabled"; 429 reg = <0xd2000 0x1000>; 430 interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; 431 #pwm-cells = <3>; 432 }; 433 434 pwm21: pwm@d3000 { 435 compatible = "nordic,nrf-pwm"; 436 status = "disabled"; 437 reg = <0xd3000 0x1000>; 438 interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; 439 #pwm-cells = <3>; 440 }; 441 442 pwm22: pwm@d4000 { 443 compatible = "nordic,nrf-pwm"; 444 status = "disabled"; 445 reg = <0xd4000 0x1000>; 446 interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; 447 #pwm-cells = <3>; 448 }; 449 450 adc: adc@d5000 { 451 compatible = "nordic,nrf-saadc"; 452 reg = <0xd5000 0x1000>; 453 interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; 454 status = "disabled"; 455 #io-channel-cells = <1>; 456 }; 457 458 nfct: nfct@d6000 { 459 compatible = "nordic,nrf-nfct"; 460 reg = <0xd6000 0x1000>; 461 interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; 462 status = "disabled"; 463 }; 464 465 temp: temp@d7000 { 466 compatible = "nordic,nrf-temp"; 467 reg = <0xd7000 0x1000>; 468 interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; 469 status = "disabled"; 470 }; 471 472 gpio1: gpio@d8200 { 473 compatible = "nordic,nrf-gpio"; 474 gpio-controller; 475 reg = <0xd8200 0x300>; 476 #gpio-cells = <2>; 477 ngpios = <16>; 478 status = "disabled"; 479 port = <1>; 480 gpiote-instance = <&gpiote20>; 481 }; 482 483 gpiote20: gpiote@da000 { 484 compatible = "nordic,nrf-gpiote"; 485 reg = <0xda000 0x1000>; 486 status = "disabled"; 487 instance = <20>; 488 }; 489 490 qdec20: qdec@e0000 { 491 compatible = "nordic,nrf-qdec"; 492 reg = <0xe0000 0x1000>; 493 interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; 494 status = "disabled"; 495 }; 496 497 qdec21: qdec@e1000 { 498 compatible = "nordic,nrf-qdec"; 499 reg = <0xe1000 0x1000>; 500 interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; 501 status = "disabled"; 502 }; 503 504 grtc: grtc@e2000 { 505 compatible = "nordic,nrf-grtc"; 506 reg = <0xe2000 0x1000>; 507 cc-num = <12>; 508 status = "disabled"; 509 }; 510 511 i2c23: i2c@ed000 { 512 compatible = "nordic,nrf-twim"; 513 #address-cells = <1>; 514 #size-cells = <0>; 515 reg = <0xed000 0x1000>; 516 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 517 easydma-maxcnt-bits = <16>; 518 status = "disabled"; 519 zephyr,pm-device-runtime-auto; 520 }; 521 522 spi23: spi@ed000 { 523 /* 524 * This spi node can be either SPIM or SPIS, 525 * for the user to pick: 526 * compatible = "nordic,nrf-spim" or 527 * "nordic,nrf-spis". 528 */ 529 compatible = "nordic,nrf-spim"; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 reg = <0xed000 0x1000>; 533 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 534 max-frequency = <DT_FREQ_M(8)>; 535 easydma-maxcnt-bits = <16>; 536 rx-delay-supported; 537 rx-delay = <1>; 538 status = "disabled"; 539 }; 540 541 uart23: uart@ed000 { 542 compatible = "nordic,nrf-uarte"; 543 reg = <0xed000 0x1000>; 544 interrupts = <237 NRF_DEFAULT_IRQ_PRIORITY>; 545 status = "disabled"; 546 endtx-stoptx-supported; 547 frame-timeout-supported; 548 }; 549 550 i2c24: i2c@ee000 { 551 compatible = "nordic,nrf-twim"; 552 #address-cells = <1>; 553 #size-cells = <0>; 554 reg = <0xee000 0x1000>; 555 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 556 easydma-maxcnt-bits = <16>; 557 status = "disabled"; 558 zephyr,pm-device-runtime-auto; 559 }; 560 561 spi24: spi@ee000 { 562 /* 563 * This spi node can be either SPIM or SPIS, 564 * for the user to pick: 565 * compatible = "nordic,nrf-spim" or 566 * "nordic,nrf-spis". 567 */ 568 compatible = "nordic,nrf-spim"; 569 #address-cells = <1>; 570 #size-cells = <0>; 571 reg = <0xee000 0x1000>; 572 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 573 max-frequency = <DT_FREQ_M(8)>; 574 easydma-maxcnt-bits = <16>; 575 rx-delay-supported; 576 rx-delay = <1>; 577 status = "disabled"; 578 }; 579 580 uart24: uart@ee000 { 581 compatible = "nordic,nrf-uarte"; 582 reg = <0xee000 0x1000>; 583 interrupts = <238 NRF_DEFAULT_IRQ_PRIORITY>; 584 status = "disabled"; 585 endtx-stoptx-supported; 586 frame-timeout-supported; 587 }; 588 589 dppic30: dppic@102000 { 590 compatible = "nordic,nrf-dppic"; 591 reg = <0x102000 0x808>; 592 status = "disabled"; 593 }; 594 595 ppib30: ppib@103000 { 596 compatible = "nordic,nrf-ppib"; 597 reg = <0x103000 0x1000>; 598 status = "disabled"; 599 }; 600 601 i2c30: i2c@104000 { 602 compatible = "nordic,nrf-twim"; 603 #address-cells = <1>; 604 #size-cells = <0>; 605 reg = <0x104000 0x1000>; 606 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 607 easydma-maxcnt-bits = <16>; 608 status = "disabled"; 609 zephyr,pm-device-runtime-auto; 610 }; 611 612 spi30: spi@104000 { 613 /* 614 * This spi node can be either SPIM or SPIS, 615 * for the user to pick: 616 * compatible = "nordic,nrf-spim" or 617 * "nordic,nrf-spis". 618 */ 619 compatible = "nordic,nrf-spim"; 620 #address-cells = <1>; 621 #size-cells = <0>; 622 reg = <0x104000 0x1000>; 623 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 624 max-frequency = <DT_FREQ_M(8)>; 625 easydma-maxcnt-bits = <16>; 626 rx-delay-supported; 627 rx-delay = <1>; 628 status = "disabled"; 629 }; 630 631 uart30: uart@104000 { 632 compatible = "nordic,nrf-uarte"; 633 reg = <0x104000 0x1000>; 634 interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; 635 status = "disabled"; 636 endtx-stoptx-supported; 637 frame-timeout-supported; 638 }; 639 640 wdt30: watchdog@108000 { 641 compatible = "nordic,nrf-wdt"; 642 reg = <0x108000 0x620>; 643 interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; 644 status = "disabled"; 645 }; 646 647 wdt31: watchdog@109000 { 648 compatible = "nordic,nrf-wdt"; 649 reg = <0x109000 0x620>; 650 interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; 651 status = "disabled"; 652 }; 653 654 gpio0: gpio@10a000 { 655 compatible = "nordic,nrf-gpio"; 656 gpio-controller; 657 reg = <0x10a000 0x300>; 658 #gpio-cells = <2>; 659 ngpios = <5>; 660 status = "disabled"; 661 port = <0>; 662 gpiote-instance = <&gpiote30>; 663 }; 664 665 gpiote30: gpiote@10c000 { 666 compatible = "nordic,nrf-gpiote"; 667 reg = <0x10c000 0x1000>; 668 status = "disabled"; 669 instance = <30>; 670 }; 671 672 clock: clock@10e000 { 673 compatible = "nordic,nrf-clock"; 674 reg = <0x10e000 0x1000>; 675 interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; 676 status = "disabled"; 677 }; 678 679 regulators: regulator@120000 { 680 compatible = "nordic,nrf54l-regulators"; 681 reg = <0x120000 0x1000>; 682 status = "disabled"; 683 #address-cells = <1>; 684 #size-cells = <1>; 685 686 vregmain: regulator@120600 { 687 compatible = "nordic,nrf5x-regulator"; 688 reg = <0x120600 0x1>; 689 status = "disabled"; 690 regulator-name = "VREGMAIN"; 691 regulator-initial-mode = <NRF5X_REG_MODE_LDO>; 692 }; 693 }; 694 }; 695 696 rram_controller: rram-controller@5004e000 { 697 compatible = "nordic,rram-controller"; 698 reg = <0x5004e000 0x1000>; 699 interrupts = <78 NRF_DEFAULT_IRQ_PRIORITY>; 700 #address-cells = <1>; 701 #size-cells = <1>; 702 703 cpuapp_rram: rram@0 { 704 compatible = "soc-nv-flash"; 705 reg = <0x0 DT_SIZE_K(2028)>; 706 erase-block-size = <4096>; 707 write-block-size = <16>; 708 }; 709 }; 710 711 cpuapp_ppb: cpuapp-ppb-bus { 712 #address-cells = <1>; 713 #size-cells = <1>; 714 715 cpuapp_nvic: interrupt-controller@e000e100 { 716 #address-cells = <1>; 717 compatible = "arm,v8m-nvic"; 718 reg = <0xe000e100 0xc00>; 719 arm,num-irq-priority-bits = <3>; 720 interrupt-controller; 721 #interrupt-cells = <2>; 722 }; 723 724 cpuapp_systick: timer@e000e010 { 725 compatible = "arm,armv8m-systick"; 726 reg = <0xe000e010 0x10>; 727 status = "disabled"; 728 }; 729 }; 730 }; 731}; 732
