1/*
2 * Copyright (c) 2024 BayLibre
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <st/l4/stm32l4s5Xi.dtsi>
10#include <st/l4/stm32l4s5qiix-pinctrl.dtsi>
11
12/ {
13	model = "Analog Devices Inc. EVAL-ADIN2111EBZ board";
14	compatible = "adi,eval-adin2111ebz";
15
16	chosen {
17		zephyr,console = &usart1;
18		zephyr,shell-uart = &usart1;
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21		zephyr,code-partition = &slot0_partition;
22	};
23
24	leds {
25		compatible = "gpio-leds";
26		blue_led: uC_led1 {
27			gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
28			label = "Debug led uC1";
29		};
30		net_red_led: led_NET1 {
31			gpios = <&gpiob 10 GPIO_ACTIVE_LOW>;
32			label = "NET led 1";
33		};
34		net_green_led: led_NET2 {
35			gpios = <&gpiob 11 GPIO_ACTIVE_LOW>;
36			label = "NET led 2";
37		};
38		mod_red_led: led_MOD1 {
39			gpios = <&gpioe 2 GPIO_ACTIVE_LOW>;
40			label = "Mod led 1";
41		};
42		mod_green_led: led_MOD2 {
43			gpios = <&gpioe 6 GPIO_ACTIVE_LOW>;
44			label = "Mod led 2";
45		};
46	};
47
48	aliases {
49		led0 = &blue_led;
50		watchdog0 = &iwdg;
51	};
52};
53
54&clk_lsi {
55	status = "okay";
56};
57
58&clk_hsi48 {
59	status = "okay";
60};
61
62&clk_hsi {
63	status = "okay";
64};
65
66&pll {
67	div-m = <4>;
68	mul-n = <40>;
69	div-q = <2>;
70	div-r = <2>;
71	clocks = <&clk_hsi>;
72	status = "okay";
73};
74
75&rcc {
76	clocks = <&pll>;
77	clock-frequency = <DT_FREQ_M(80)>;
78	ahb-prescaler = <1>;
79	apb1-prescaler = <1>;
80	apb2-prescaler = <1>;
81};
82
83&flash0 {
84	partitions {
85		compatible = "fixed-partitions";
86		#address-cells = <1>;
87		#size-cells = <1>;
88
89		boot_partition: partition@0 {
90			label = "mcuboot";
91			reg = <0x00000000 DT_SIZE_K(64)>;
92			read-only;
93		};
94
95		/*
96		 * The flash starting at offset 0x10000 and ending at
97		 * offset 0x1ffff is reserved for use by the application.
98		 */
99
100		slot0_partition: partition@20000 {
101			label = "image-0";
102			reg = <0x00020000 DT_SIZE_K(432)>;
103		};
104		slot1_partition: partition@8c000 {
105			label = "image-1";
106			reg = <0x0008C000 DT_SIZE_K(432)>;
107		};
108		scratch_partition: partition@f8000 {
109			label = "image-scratch";
110			reg = <0x000F8000 DT_SIZE_K(16)>;
111		};
112
113		storage_partition: partition@fc000 {
114			label = "storage";
115			reg = <0x000fc000 DT_SIZE_K(16)>;
116		};
117	};
118};
119
120&iwdg {
121	status = "okay";
122};
123
124&rng {
125	status = "okay";
126};
127
128&dma1 {
129	status = "okay";
130};
131
132&dmamux1 {
133	status = "okay";
134};
135
136&usart1 { /* USB FT232 */
137	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
138	pinctrl-names = "default";
139	current-speed = <115200>;
140	status = "okay";
141};
142
143&spi1 {
144	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
145	pinctrl-names = "default";
146	cs-gpios = <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
147	status = "okay";
148
149	flash_ext: flash@0 {
150		compatible = "issi,is25lp128", "jedec,spi-nor";
151		size = <134217728>;
152		jedec-id = [96 60 18];
153		reg = <0>;
154		spi-max-frequency = <133000000>;
155		status = "okay";
156	};
157};
158
159&spi2 {
160	pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
161	pinctrl-names = "default";
162	cs-gpios = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
163	status = "okay";
164	dmas = <&dmamux1 2 13 (STM32_DMA_MEMORY_TO_PERIPH | STM32_DMA_MEM_INC |
165		       STM32_DMA_MEM_8BITS | STM32_DMA_PERIPH_8BITS)>,
166		       <&dmamux1 3 12 (STM32_DMA_PERIPH_TO_MEMORY | STM32_DMA_MEM_INC |
167		       STM32_DMA_MEM_8BITS | STM32_DMA_PERIPH_8BITS)>;
168	dma-names = "tx", "rx";
169
170	adin2111: adin2111@0 {
171		compatible = "adi,adin2111";
172		reg = <0x0>;
173		spi-max-frequency = <25000000>;
174		int-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
175		status = "okay";
176		spi-oa;
177		spi-oa-protection;
178
179		port1 {
180			local-mac-address = [ 00 E0 22 FE DA C9 ];
181		};
182		port2 {
183			local-mac-address = [ 00 E0 22 FE DA D9 ];
184		};
185		mdio {
186			compatible = "adi,adin2111-mdio";
187			#address-cells = <1>;
188			#size-cells = <0>;
189			status = "okay";
190
191			ethernet-phy@1 {
192				reg = <0x1>;
193				compatible = "adi,adin2111-phy";
194				status = "okay";
195			};
196			ethernet-phy@2 {
197				reg = <0x2>;
198				compatible = "adi,adin2111-phy";
199				status = "okay";
200			};
201		};
202	};
203};
204