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Searched defs:divider (Results 1 – 25 of 34) sorted by relevance

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/Zephyr-latest/soc/nxp/rw/
Dflexspi_clock_setup.c25 uint32_t divider; in flexspi_clock_set_freq() local
60 void __ramfunc set_flexspi_clock(FLEXSPI_Type *base, uint32_t src, uint32_t divider) in set_flexspi_clock()
/Zephyr-latest/drivers/pwm/
Dpwm_sam.c30 uint8_t divider; member
38 uint8_t divider = config->divider; in sam_pwm_get_cycles_per_sec() local
101 uint8_t divider = config->divider; in sam_pwm_init() local
/Zephyr-latest/soc/nxp/mcx/mcxn/
Dflash_clock_setup.c12 uint8_t divider; in flexspi_clock_set_freq() local
/Zephyr-latest/soc/nxp/imxrt/imxrt10xx/
Dflexspi.c16 uint8_t divider; in flexspi_clock_set_freq() local
Dlpm_rt1064.c77 static void clock_set_div(clock_div_t divider, uint32_t value) in clock_set_div()
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/
Dflexspi.c21 uint32_t divider; in flexspi_clock_set_freq() local
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dflexspi.c21 uint32_t divider; in flexspi_clock_set_freq() local
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/cm33/
Dflash_clock_setup.c78 void flexspi_setup_clock(FLEXSPI_Type *base, uint32_t src, uint32_t divider) in flexspi_setup_clock()
/Zephyr-latest/soc/nxp/imxrt/imxrt6xx/cm33/
Dflash_clock_setup.c79 void flexspi_setup_clock(FLEXSPI_Type *base, uint32_t src, uint32_t divider) in flexspi_setup_clock()
/Zephyr-latest/drivers/clock_control/
Dclock_control_si32_apb.c20 uint32_t divider; member
Dclock_control_renesas_cpg_mssr.c94 uint32_t divider = RCAR_CPG_NONE; in rcar_cpg_get_divider() local
123 uint32_t divider = rcar_cpg_get_divider(dev, clk_info); in rcar_cpg_update_out_freq() local
267 uint32_t divider; in rcar_cpg_set_rate() local
Dclock_control_mcux_ccm_rev2.c176 uint32_t divider = CLOCK_GetRootClockDiv(clock_root); in mcux_ccm_get_subsys_rate() local
Dclock_control_litex.c355 uint32_t *divider, uint32_t *fract_cnt) in litex_clk_get_clkout_divider()
849 uint32_t divider; in litex_clk_get_duty_cycle() local
908 divider = lcko->config.div; in litex_clk_calc_duty_normal() local
963 uint32_t divider) in litex_clk_calc_duty_high_time()
1028 uint8_t divider = lcko->config.div; in litex_clk_calc_phase_normal() local
1132 uint32_t divider = 0, fract_cnt, post_glob_div_f, in litex_clk_get_phase() local
1403 uint8_t *divider = &lcko->config.div, in litex_clk_write_rate() local
Dclock_control_r8a7795_cpg_mssr.c204 static int r8a7795_set_rate_helper(uint32_t module, uint32_t *divider, uint32_t *div_mask) in r8a7795_set_rate_helper()
Dclock_control_r8a779f0_cpg_mssr.c202 static int r8a779f0_set_rate_helper(uint32_t module, uint32_t *divider, uint32_t *div_mask) in r8a779f0_set_rate_helper()
/Zephyr-latest/drivers/sensor/st/lis3mdl/
Dlis3mdl.c22 uint16_t divider) in lis3mdl_convert()
/Zephyr-latest/drivers/sensor/honeywell/hmc5883l/
Dhmc5883l.c22 uint16_t divider) in hmc5883l_convert()
/Zephyr-latest/drivers/mdio/
Dmdio_xmc4xxx.c30 uint8_t divider; member
125 uint8_t divider = mdio_clock_divider[i].divider; in mdio_xmc4xxx_set_clock_divider() local
Dmdio_nxp_enet_qos.c158 int ret, divider; in nxp_enet_qos_mdio_init() local
/Zephyr-latest/drivers/watchdog/
Dwdt_fwdgt_gd32.c56 uint16_t divider = 4U; in gd32_fwdgt_calc_timeout() local
Dwdt_iwdg_stm32.c66 uint16_t divider = 4U; in iwdg_stm32_convert_timeout() local
Dwdt_mcux_wdog32.c78 #define MSEC_TO_WDOG32_TICKS(clock_freq, divider, msec) \ argument
/Zephyr-latest/drivers/serial/
Duart_b91.c142 uint16_t *divider, uint8_t *bwpc) in uart_b91_cal_div_and_bwpc()
201 static void uart_b91_init(volatile struct uart_b91_t *uart, uint16_t divider, in uart_b91_init()
250 uint16_t divider; in uart_b91_configure() local
310 uint16_t divider = 0u; in uart_b91_driver_init() local
/Zephyr-latest/drivers/sensor/st/lps2xdf/
Dlps2xdf.c90 int divider; in lps2xdf_press_convert() local
/Zephyr-latest/drivers/i2c/
Di2c_renesas_ra_iic.c59 uint32_t divider; member
310 uint32_t brh, uint32_t divider, in calc_iic_master_bitrate()

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