| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/ |
| D | fsl_clock.h | 629 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
659 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
744 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
787 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
851 scg_async_clk_div_t div1; /*!< APLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/ |
| D | fsl_clock.h | 629 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
659 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
744 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
787 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
851 scg_async_clk_div_t div1; /*!< APLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/ |
| D | fsl_clock.h | 461 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
492 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
577 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
621 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/ |
| D | fsl_clock.h | 468 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
497 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
580 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
623 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/ |
| D | fsl_clock.h | 461 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
492 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
577 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
621 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/ |
| D | fsl_clock.h | 468 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
497 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
580 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
623 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/ |
| D | fsl_clock.h | 462 scg_async_clk_div_t div1; /*!< SOSCDIV1 value. */ member
491 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
574 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
617 scg_async_clk_div_t div1; /*!< SPLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/ |
| D | fsl_clock.h | 515 scg_async_clk_div_t div1; /*!< SIRCDIV1 value. */ member
599 scg_async_clk_div_t div1; /*!< FIRCDIV1 value. */ member
682 scg_async_clk_div_t div1; /*!< LPFLLDIV1 value. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/ |
| D | fsl_clock.h | 1397 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1442 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1471 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/ |
| D | fsl_clock.h | 1397 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1442 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1471 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/ |
| D | fsl_clock.h | 1397 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1442 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1471 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/ |
| D | fsl_clock.h | 1397 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1442 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1471 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/ |
| D | fsl_clock.h | 1397 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1442 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
1471 uint8_t div1; /*!< PLLDIV_VCO divider value. Disabled when div1 == 0. */ member
|
