1 /*
2 * Copyright (c) 2023 Analog Devices Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT adi_adxl367
8
9 #include <zephyr/drivers/sensor.h>
10 #include <zephyr/kernel.h>
11 #include <zephyr/device.h>
12 #include <string.h>
13 #include <zephyr/init.h>
14 #include <zephyr/sys/printk.h>
15 #include <zephyr/sys/__assert.h>
16 #include <stdlib.h>
17 #include <zephyr/logging/log.h>
18
19 #include "adxl367.h"
20
21 LOG_MODULE_REGISTER(ADXL367, CONFIG_SENSOR_LOG_LEVEL);
22
23 static const uint8_t adxl367_scale_mul[3] = {1, 2, 4};
24 static uint8_t samples_per_set;
25
26 /**
27 * @brief Configures activity detection.
28 *
29 * @param dev - The device structure.
30 * @param th - Structure holding the activity threshold information:
31 * Enable/Disable Activity detection
32 * Enable/Disable Referenced Activity detection
33 * Set Threshold value
34 * @return 0 in case of success, negative error code otherwise.
35 */
adxl367_setup_activity_detection(const struct device * dev,const struct adxl367_activity_threshold * th)36 static int adxl367_setup_activity_detection(const struct device *dev,
37 const struct adxl367_activity_threshold *th)
38 {
39 struct adxl367_data *data = dev->data;
40 int ret;
41
42
43 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL,
44 ADXL367_ACT_INACT_CTL_ACT_EN_MSK |
45 ADXL367_ACT_INACT_CTL_ACT_REF_MSK,
46 FIELD_PREP(ADXL367_ACT_INACT_CTL_ACT_EN_MSK, th->enable) |
47 FIELD_PREP(ADXL367_ACT_INACT_CTL_ACT_REF_MSK,
48 th->referenced));
49 if (ret != 0) {
50 return ret;
51 }
52
53 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_H, ADXL367_THRESH_H_MSK,
54 FIELD_PREP(ADXL367_THRESH_H_MSK, th->value >> 6));
55 if (ret != 0) {
56 return ret;
57 }
58
59 return data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_L, ADXL367_THRESH_L_MSK,
60 FIELD_PREP(ADXL367_THRESH_L_MSK, th->value & 0x3F));
61 }
62
63 /**
64 * @brief Configures activity detection.
65 *
66 * @param dev - The device structure.
67 * @param th - Structure holding the inactivity threshold information:
68 * Enable/Disable inactivity detection
69 * Enable/Disable Referenced inactivity detection
70 * Set Threshold value
71 *
72 * @return 0 in case of success, negative error code otherwise.
73 */
adxl367_setup_inactivity_detection(const struct device * dev,const struct adxl367_activity_threshold * th)74 static int adxl367_setup_inactivity_detection(const struct device *dev,
75 const struct adxl367_activity_threshold *th)
76 {
77 struct adxl367_data *data = dev->data;
78 int ret;
79
80 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL,
81 ADXL367_ACT_INACT_CTL_INACT_EN_MSK |
82 ADXL367_ACT_INACT_CTL_INACT_REF_MSK,
83 FIELD_PREP(ADXL367_ACT_INACT_CTL_INACT_EN_MSK,
84 th->enable) |
85 FIELD_PREP(ADXL367_ACT_INACT_CTL_INACT_REF_MSK,
86 th->referenced));
87 if (ret != 0) {
88 return ret;
89 }
90
91 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_INACT_H, ADXL367_THRESH_H_MSK,
92 FIELD_PREP(ADXL367_THRESH_H_MSK, th->value >> 6));
93 if (ret != 0) {
94 return ret;
95 }
96
97 return data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_INACT_L, ADXL367_THRESH_L_MSK,
98 FIELD_PREP(ADXL367_THRESH_L_MSK, th->value & 0x3F));
99 }
100
101 /**
102 * @brief Set the mode of operation.
103 *
104 * @param dev - The device structure.
105 * @param op_mode - Mode of operation.
106 * Accepted values: ADXL367_STANDBY
107 * ADXL367_MEASURE
108 *
109 * @return 0 in case of success, negative error code otherwise.
110 */
adxl367_set_op_mode(const struct device * dev,enum adxl367_op_mode op_mode)111 static int adxl367_set_op_mode(const struct device *dev,
112 enum adxl367_op_mode op_mode)
113 {
114 struct adxl367_data *data = dev->data;
115 int ret;
116
117 ret = data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL,
118 ADXL367_POWER_CTL_MEASURE_MSK,
119 FIELD_PREP(ADXL367_POWER_CTL_MEASURE_MSK, op_mode));
120 if (ret != 0) {
121 return ret;
122 }
123
124 if (op_mode == ADXL367_MEASURE)
125 /* Wait 100 ms to allow the acceleration outputs to settle */
126 k_sleep(K_MSEC(100));
127
128 return 0;
129 }
130
131 /**
132 * @brief Autosleep. When set to 1, autosleep is enabled, and the device enters
133 * wake-up mode automatically upon detection of inactivity.
134 *
135 * @param dev - The device structure.
136 * @param enable - Accepted values: true
137 * false
138 *
139 * @return 0 in case of success, negative error code otherwise.
140 */
adxl367_set_autosleep(const struct device * dev,bool enable)141 static int adxl367_set_autosleep(const struct device *dev, bool enable)
142 {
143 struct adxl367_data *data = dev->data;
144
145 return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL,
146 ADXL367_POWER_CTL_AUTOSLEEP_MSK,
147 FIELD_PREP(ADXL367_POWER_CTL_AUTOSLEEP_MSK, enable));
148 }
149
150 /**
151 * @brief Noise Mode. When set to 1, low noise mode is enabled
152 *
153 * @param dev - The device structure.
154 * @param enable - Accepted values: true
155 * false
156 *
157 * @return 0 in case of success, negative error code otherwise.
158 */
adxl367_set_low_noise(const struct device * dev,bool enable)159 static int adxl367_set_low_noise(const struct device *dev, bool enable)
160 {
161 struct adxl367_data *data = dev->data;
162
163 return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL,
164 ADXL367_POWER_CTL_NOISE_MSK,
165 FIELD_PREP(ADXL367_POWER_CTL_NOISE_MSK, enable));
166 }
167
168 /**
169 * @brief Link/Loop Activity Processing.
170 *
171 * @param dev - The device structure.
172 * @param mode - Mode of operation.
173 * Accepted values: ADXL367_DEFAULT
174 * ADXL367_LINKED
175 * ADXL367_LOOPED
176 *
177 * @return 0 in case of success, negative error code otherwise.
178 */
adxl367_set_act_proc_mode(const struct device * dev,enum adxl367_act_proc_mode mode)179 static int adxl367_set_act_proc_mode(const struct device *dev,
180 enum adxl367_act_proc_mode mode)
181 {
182 struct adxl367_data *data = dev->data;
183
184 return data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL,
185 ADXL367_ACT_INACT_CTL_LINKLOOP_MSK,
186 FIELD_PREP(ADXL367_ACT_INACT_CTL_LINKLOOP_MSK, mode));
187 }
188
189
190 /**
191 * @brief Selects the Output Data Rate of the device.
192 * @param dev - The device structure.
193 * @param odr - Output Data Rate option.
194 * Accepted values: ADXL367_ODR_12P5HZ,
195 * ADXL367_ODR_25HZ,
196 * ADXL367_ODR_50HZ,
197 * ADXL367_ODR_100HZ,
198 * ADXL367_ODR_200HZ,
199 * ADXL367_ODR_400HZ
200 * @return 0 in case of success, negative error code otherwise.
201 */
adxl367_set_output_rate(const struct device * dev,enum adxl367_odr odr)202 int adxl367_set_output_rate(const struct device *dev, enum adxl367_odr odr)
203 {
204 struct adxl367_data *data = dev->data;
205
206 return data->hw_tf->write_reg_mask(dev,
207 ADXL367_FILTER_CTL,
208 ADXL367_FILTER_CTL_ODR_MSK,
209 FIELD_PREP(ADXL367_FILTER_CTL_ODR_MSK, odr));
210 }
211
212 /**
213 * @brief Selects the measurement range.
214 *
215 * @param dev - The device structure.
216 * @param range - Range option.
217 * Accepted values: ADXL367_2G_RANGE, +/- 2g
218 * ADXL367_4G_RANGE, +/- 4g
219 * ADXL367_8G_RANGE +/- 8g
220 *
221 * @return 0 in case of success, negative error code otherwise.
222 */
adxl367_set_range(const struct device * dev,enum adxl367_range range)223 int adxl367_set_range(const struct device *dev, enum adxl367_range range)
224 {
225 struct adxl367_data *data = dev->data;
226
227 return data->hw_tf->write_reg_mask(dev,
228 ADXL367_FILTER_CTL,
229 ADXL367_FILTER_CTL_RANGE_MSK,
230 FIELD_PREP(ADXL367_FILTER_CTL_RANGE_MSK, range));
231 }
232
233 /**
234 * @brief Set the activity timer
235 *
236 * @param dev - The device structure.
237 * @param time - The value set in this register.
238 *
239 * @return 0 in case of success, negative error code otherwise.
240 */
adxl367_set_activity_time(const struct device * dev,uint8_t time)241 static int adxl367_set_activity_time(const struct device *dev, uint8_t time)
242 {
243 struct adxl367_data *data = dev->data;
244
245 return data->hw_tf->write_reg(dev, ADXL367_TIME_ACT, time);
246 }
247
248 /**
249 * Set the inactivity timer
250 * @param dev - The device structure.
251 * @param time - is the 16-bit value set by the TIME_INACT_L register
252 * (eight LSBs) and the TIME_INACT_H register (eight MSBs).
253 * @return 0 in case of success, negative error code otherwise.
254 */
adxl367_set_inactivity_time(const struct device * dev,uint16_t time)255 static int adxl367_set_inactivity_time(const struct device *dev,
256 uint16_t time)
257 {
258 int ret;
259 struct adxl367_data *data = dev->data;
260
261 ret = data->hw_tf->write_reg(dev, ADXL367_TIME_INACT_H, time >> 8);
262 if (ret != 0) {
263 return ret;
264 }
265
266 return data->hw_tf->write_reg(dev, ADXL367_TIME_INACT_L, time & 0xFF);
267 }
268
269 /**
270 * @brief Performs self test.
271 *
272 * @param dev - The device structure.
273 *
274 * @return 0 in case of success, negative error code otherwise.
275 */
adxl367_self_test(const struct device * dev)276 int adxl367_self_test(const struct device *dev)
277 {
278 int ret;
279 struct adxl367_data *data = dev->data;
280 const struct adxl367_dev_config *cfg = dev->config;
281 int16_t x_axis_1, x_axis_2, dif, min, max;
282 uint8_t read_val[2];
283
284 uint32_t st_delay_ms;
285
286 /* 4 / ODR value in ms */
287 switch (cfg->odr) {
288 case ADXL367_ODR_12P5HZ:
289 st_delay_ms = 320;
290 break;
291 case ADXL367_ODR_25HZ:
292 st_delay_ms = 160;
293 break;
294 case ADXL367_ODR_50HZ:
295 st_delay_ms = 80;
296 break;
297 case ADXL367_ODR_100HZ:
298 st_delay_ms = 40;
299 break;
300 case ADXL367_ODR_200HZ:
301 st_delay_ms = 20;
302 break;
303 case ADXL367_ODR_400HZ:
304 st_delay_ms = 10;
305 break;
306 default:
307 return -EINVAL;
308 }
309
310 ret = adxl367_set_op_mode(dev, ADXL367_MEASURE);
311 if (ret != 0) {
312 return ret;
313 }
314
315 ret = data->hw_tf->write_reg_mask(dev, ADXL367_SELF_TEST, ADXL367_SELF_TEST_ST_MSK,
316 FIELD_PREP(ADXL367_SELF_TEST_ST_MSK, 1));
317 if (ret != 0) {
318 return ret;
319 }
320
321 /* 4 / ODR */
322 k_sleep(K_MSEC(st_delay_ms));
323
324 ret = data->hw_tf->read_reg_multiple(dev, ADXL367_X_DATA_H, read_val, 2);
325 if (ret != 0) {
326 return ret;
327 }
328
329 x_axis_1 = ((int16_t)read_val[0] << 6) + (read_val[1] >> 2);
330
331 /* extend sign to 16 bits */
332 if ((x_axis_1 & BIT(13)) != 0) {
333 x_axis_1 |= GENMASK(15, 14);
334 }
335
336 ret = data->hw_tf->write_reg_mask(dev, ADXL367_SELF_TEST,
337 ADXL367_SELF_TEST_ST_FORCE_MSK,
338 FIELD_PREP(ADXL367_SELF_TEST_ST_FORCE_MSK, 1));
339 if (ret != 0) {
340 return ret;
341 }
342
343 /* 4 / ODR */
344 k_sleep(K_MSEC(st_delay_ms));
345
346 ret = data->hw_tf->read_reg_multiple(dev, ADXL367_X_DATA_H, read_val, 2);
347 if (ret != 0) {
348 return ret;
349 }
350
351 x_axis_2 = ((int16_t)read_val[0] << 6) + (read_val[1] >> 2);
352
353 /* extend sign to 16 bits */
354 if ((x_axis_2 & BIT(13)) != 0)
355 x_axis_2 |= GENMASK(15, 14);
356
357 ret = adxl367_set_op_mode(dev, ADXL367_STANDBY);
358 if (ret != 0) {
359 return ret;
360 }
361
362 ret = data->hw_tf->write_reg_mask(dev, ADXL367_SELF_TEST, ADXL367_SELF_TEST_ST_FORCE_MSK |
363 ADXL367_SELF_TEST_ST_MSK,
364 FIELD_PREP(ADXL367_SELF_TEST_ST_FORCE_MSK, 0) |
365 FIELD_PREP(ADXL367_SELF_TEST_ST_MSK, 0));
366 if (ret != 0) {
367 return ret;
368 }
369
370 dif = x_axis_2 - x_axis_1;
371 min = ADXL367_SELF_TEST_MIN * adxl367_scale_mul[data->range];
372 max = ADXL367_SELF_TEST_MAX * adxl367_scale_mul[data->range];
373
374 if ((dif >= min) && (dif <= max)) {
375 LOG_INF("ADXL367 passed self-test\n");
376 ret = 0;
377 } else {
378 LOG_ERR("ADXL367 failed self-test\n");
379 ret = -EINVAL;
380 }
381
382 return ret;
383 }
384
385 /**
386 * @brief Enables temperature reading.
387 *
388 * @param dev - The device structure.
389 * @param enable - 1 - ENABLE
390 * 2 - DISABLE
391 *
392 * @return 0 in case of success, negative error code otherwise.
393 */
adxl367_temp_read_en(const struct device * dev,bool enable)394 int adxl367_temp_read_en(const struct device *dev, bool enable)
395 {
396 struct adxl367_data *data = dev->data;
397
398 return data->hw_tf->write_reg_mask(dev,
399 ADXL367_TEMP_CTL,
400 ADXL367_TEMP_EN_MSK,
401 FIELD_PREP(ADXL367_TEMP_EN_MSK, enable));
402 }
403
404 /**
405 * @brief Sets the number of FIFO sample sets.
406 *
407 * @param dev - The device structure.
408 * @param sets_nb - Sample sets number. For example, if ADXL367_FIFO_FORMAT_XYZ
409 * is selected, a value of 2 will represent 6 entries.
410 *
411 * @return 0 in case of success, negative error code otherwise.
412 */
adxl367_set_fifo_sample_sets_nb(const struct device * dev,uint16_t sets_nb)413 int adxl367_set_fifo_sample_sets_nb(const struct device *dev,
414 uint16_t sets_nb)
415 {
416 struct adxl367_data *data = dev->data;
417 int ret;
418 uint8_t fifo_samples_msb = sets_nb & BIT(9) ? 1U : 0U;
419
420 /* bit 9 goes to FIFO_SAMPLES from ADXL367_FIFO_CONTROL */
421 ret = data->hw_tf->write_reg_mask(dev, ADXL367_FIFO_CONTROL,
422 ADXL367_FIFO_CONTROL_FIFO_SAMPLES_MSK,
423 FIELD_PREP(ADXL367_FIFO_CONTROL_FIFO_SAMPLES_MSK,
424 fifo_samples_msb));
425 if (ret != 0) {
426 return ret;
427 }
428
429 /* write last 8 bits to ADXL367_FIFO_SAMPLES */
430 return data->hw_tf->write_reg(dev, ADXL367_FIFO_SAMPLES, sets_nb & 0xFF);
431 }
432
433 /**
434 * @brief Sets FIFO mode.
435 *
436 * @param dev - The device structure.
437 * @param mode - FIFO mode.
438 * Accepted values: ADXL367_FIFO_DISABLED,
439 * ADXL367_OLDEST_SAVED,
440 * ADXL367_STREAM_MODE,
441 * ADXL367_TRIGGERED_MODE
442 *
443 * @return 0 in case of success, negative error code otherwise.
444 */
adxl367_set_fifo_mode(const struct device * dev,enum adxl367_fifo_mode mode)445 int adxl367_set_fifo_mode(const struct device *dev,
446 enum adxl367_fifo_mode mode)
447 {
448 struct adxl367_data *data = dev->data;
449
450 return data->hw_tf->write_reg_mask(dev,
451 ADXL367_FIFO_CONTROL,
452 ADXL367_FIFO_CONTROL_FIFO_MODE_MSK,
453 FIELD_PREP(ADXL367_FIFO_CONTROL_FIFO_MODE_MSK, mode));
454 }
455
456 /**
457 * @brief Sets FIFO read mode.
458 *
459 * @param dev - The device structure.
460 * @param read_mode - FIFO read mode.
461 * Accepted values: ADXL367_12B_CHID,
462 * ADXL367_8B,
463 * ADXL367_12B,
464 * ADXL367_14B_CHID
465 *
466 * @return 0 in case of success, negative error code otherwise.
467 */
adxl367_set_fifo_read_mode(const struct device * dev,enum adxl367_fifo_read_mode read_mode)468 int adxl367_set_fifo_read_mode(const struct device *dev,
469 enum adxl367_fifo_read_mode read_mode)
470 {
471 struct adxl367_data *data = dev->data;
472
473 return data->hw_tf->write_reg_mask(dev, ADXL367_ADC_CTL,
474 ADXL367_FIFO_8_12BIT_MSK,
475 FIELD_PREP(ADXL367_FIFO_8_12BIT_MSK, read_mode));
476 }
477
478 /**
479 * @brief Sets FIFO format.
480 *
481 * @param dev - The device structure.
482 * @param format - FIFO format.
483 * Accepted values: ADXL367_FIFO_FORMAT_XYZ,
484 * ADXL367_FIFO_FORMAT_X,
485 * ADXL367_FIFO_FORMAT_Y,
486 * ADXL367_FIFO_FORMAT_Z,
487 * ADXL367_FIFO_FORMAT_XYZT,
488 * ADXL367_FIFO_FORMAT_XT,
489 * ADXL367_FIFO_FORMAT_YT,
490 * ADXL367_FIFO_FORMAT_ZT,
491 * ADXL367_FIFO_FORMAT_XYZA,
492 * ADXL367_FIFO_FORMAT_XA,
493 * ADXL367_FIFO_FORMAT_YA,
494 * ADXL367_FIFO_FORMAT_ZA
495 *
496 * @return 0 in case of success, negative error code otherwise.
497 */
adxl367_set_fifo_format(const struct device * dev,enum adxl367_fifo_format format)498 int adxl367_set_fifo_format(const struct device *dev,
499 enum adxl367_fifo_format format)
500 {
501 int ret;
502 struct adxl367_data *data = dev->data;
503
504 ret = data->hw_tf->write_reg_mask(dev,
505 ADXL367_FIFO_CONTROL,
506 ADXL367_FIFO_CONTROL_FIFO_CHANNEL_MSK,
507 FIELD_PREP(ADXL367_FIFO_CONTROL_FIFO_CHANNEL_MSK, format));
508 if (ret != 0) {
509 return ret;
510 }
511
512 switch (format) {
513 case ADXL367_FIFO_FORMAT_XYZ:
514 samples_per_set = 3;
515 break;
516 case ADXL367_FIFO_FORMAT_X:
517 case ADXL367_FIFO_FORMAT_Y:
518 case ADXL367_FIFO_FORMAT_Z:
519 samples_per_set = 1;
520 break;
521 case ADXL367_FIFO_FORMAT_XYZT:
522 case ADXL367_FIFO_FORMAT_XYZA:
523 samples_per_set = 4;
524 break;
525 case ADXL367_FIFO_FORMAT_XT:
526 case ADXL367_FIFO_FORMAT_YT:
527 case ADXL367_FIFO_FORMAT_ZT:
528 case ADXL367_FIFO_FORMAT_XA:
529 case ADXL367_FIFO_FORMAT_YA:
530 case ADXL367_FIFO_FORMAT_ZA:
531 samples_per_set = 2;
532 break;
533 default:
534 return -EINVAL;
535 }
536
537 return 0;
538 }
539
540 /**
541 * @brief Configures the FIFO feature. Uses ADXL367_14B_CHID read mode as
542 * default.
543 *
544 * @param dev - The device structure.
545 * @param mode - FIFO mode selection.
546 * Example: ADXL367_FIFO_DISABLED,
547 * ADXL367_OLDEST_SAVED,
548 * ADXL367_STREAM_MODE,
549 * ADXL367_TRIGGERED_MODE
550 * @param format - FIFO format selection.
551 * Example: ADXL367_FIFO_FORMAT_XYZ,
552 * ADXL367_FIFO_FORMAT_X,
553 * ADXL367_FIFO_FORMAT_Y,
554 * ADXL367_FIFO_FORMAT_Z,
555 * ADXL367_FIFO_FORMAT_XYZT,
556 * ADXL367_FIFO_FORMAT_XT,
557 * ADXL367_FIFO_FORMAT_YT,
558 * ADXL367_FIFO_FORMAT_ZT,
559 * ADXL367_FIFO_FORMAT_XYZA,
560 * ADXL367_FIFO_FORMAT_XA,
561 * ADXL367_FIFO_FORMAT_YA,
562 * ADXL367_FIFO_FORMAT_ZA
563 * @param read_mode - FIFO read mode.
564 * Accepted values: ADXL367_12B_CHID,
565 * ADXL367_8B,
566 * ADXL367_12B,
567 * ADXL367_14B_CHID
568 * @param sets_nb - Specifies the number of samples sets to store in the FIFO.
569 *
570 * @return 0 in case of success, negative error code otherwise.
571 */
adxl367_fifo_setup(const struct device * dev,enum adxl367_fifo_mode mode,enum adxl367_fifo_format format,enum adxl367_fifo_read_mode read_mode,uint8_t sets_nb)572 int adxl367_fifo_setup(const struct device *dev,
573 enum adxl367_fifo_mode mode,
574 enum adxl367_fifo_format format,
575 enum adxl367_fifo_read_mode read_mode,
576 uint8_t sets_nb)
577 {
578 int ret;
579
580 ret = adxl367_set_fifo_mode(dev, mode);
581 if (ret != 0) {
582 return ret;
583 }
584
585 ret = adxl367_set_fifo_format(dev, format);
586 if (ret != 0) {
587 return ret;
588 }
589
590 ret = adxl367_set_fifo_sample_sets_nb(dev, sets_nb);
591 if (ret != 0) {
592 return ret;
593 }
594
595 return adxl367_set_fifo_read_mode(dev, read_mode);
596 }
597
598 /**
599 * @brief Software reset.
600 *
601 * @param dev - The device structure.
602 *
603 * @return 0 in case of success, negative error code otherwise.
604 */
adxl367_reset(const struct device * dev)605 static int adxl367_reset(const struct device *dev)
606 {
607 int ret;
608 struct adxl367_data *data = dev->data;
609
610 ret = adxl367_set_op_mode(dev, ADXL367_STANDBY);
611 if (ret != 0) {
612 return ret;
613 }
614
615 /* Writing code 0x52 resets the device */
616 ret = data->hw_tf->write_reg(dev, ADXL367_SOFT_RESET, ADXL367_RESET_CODE);
617 if (ret != 0) {
618 return ret;
619 }
620
621 /* Delay required after performing software reset */
622 k_sleep(K_MSEC(8));
623
624 return ret;
625 }
626
627
628 /**
629 * @brief Reads the 3-axis raw data from the accelerometer.
630 *
631 * @param dev - The device structure.
632 * @param accel_data - store the XYZ axis accelerometer data.
633 *
634 * @return 0 in case of success, negative error code otherwise.
635 */
adxl367_get_accel_data(const struct device * dev,struct adxl367_xyz_accel_data * accel_data)636 int adxl367_get_accel_data(const struct device *dev,
637 struct adxl367_xyz_accel_data *accel_data)
638 {
639 int ret;
640 uint8_t xyz_values[6] = { 0 };
641 uint8_t reg_data, nready = 1U;
642 struct adxl367_data *data = dev->data;
643
644 while (nready != 0) {
645 ret = data->hw_tf->read_reg(dev, ADXL367_STATUS, ®_data);
646 if (ret != 0) {
647 return ret;
648 }
649
650 if ((reg_data & ADXL367_STATUS_DATA_RDY) != 0) {
651 nready = 0U;
652 }
653 }
654
655 ret = data->hw_tf->read_reg_multiple(dev, ADXL367_X_DATA_H, xyz_values, 6);
656 if (ret != 0) {
657 return ret;
658 }
659
660 /* result is 14 bits long, ignore last 2 bits from low byte */
661 accel_data->x = ((int16_t)xyz_values[0] << 6) + (xyz_values[1] >> 2);
662 accel_data->y = ((int16_t)xyz_values[2] << 6) + (xyz_values[3] >> 2);
663 accel_data->z = ((int16_t)xyz_values[4] << 6) + (xyz_values[5] >> 2);
664
665 /* extend sign to 16 bits */
666 if ((accel_data->x & BIT(13)) != 0) {
667 accel_data->x |= GENMASK(15, 14);
668 }
669
670 if ((accel_data->y & BIT(13)) != 0) {
671 accel_data->y |= GENMASK(15, 14);
672 }
673
674 if ((accel_data->z & BIT(13)) != 0) {
675 accel_data->z |= GENMASK(15, 14);
676 }
677
678 return 0;
679 }
680
681 /**
682 * @brief Reads the raw temperature of the device. If ADXL367_TEMP_EN is not
683 * set, use adxl367_temp_read_en() first to enable temperature reading.
684 *
685 * @param dev - The device structure.
686 * @param raw_temp - Raw value of temperature.
687 *
688 * @return 0 in case of success, negative error code otherwise.
689 */
adxl367_get_temp_data(const struct device * dev,int16_t * raw_temp)690 int adxl367_get_temp_data(const struct device *dev, int16_t *raw_temp)
691 {
692 int ret;
693 uint8_t temp[2] = { 0 };
694 uint8_t reg_data, nready = 1U;
695 struct adxl367_data *data = dev->data;
696
697 while (nready != 0) {
698 ret = data->hw_tf->read_reg(dev, ADXL367_STATUS, ®_data);
699 if (ret != 0) {
700 return ret;
701 }
702
703 if ((reg_data & ADXL367_STATUS_DATA_RDY) != 0) {
704 nready = 0U;
705 }
706 }
707
708 ret = data->hw_tf->read_reg_multiple(dev, ADXL367_TEMP_H, temp, 2);
709 if (ret != 0) {
710 return ret;
711 }
712
713 *raw_temp = ((int16_t)temp[0] << 6) + (temp[1] >> 2);
714 /* extend sign to 16 bits */
715 if ((*raw_temp & BIT(13)) != 0) {
716 *raw_temp |= GENMASK(15, 14);
717 }
718
719 return 0;
720 }
721
adxl367_attr_set_thresh(const struct device * dev,enum sensor_channel chan,enum sensor_attribute attr,const struct sensor_value * val)722 static int adxl367_attr_set_thresh(const struct device *dev,
723 enum sensor_channel chan,
724 enum sensor_attribute attr,
725 const struct sensor_value *val)
726 {
727 const struct adxl367_dev_config *cfg = dev->config;
728 struct adxl367_activity_threshold threshold;
729 int64_t llvalue;
730 int32_t value;
731 int64_t micro_ms2 = val->val1 * 1000000LL + val->val2;
732
733 llvalue = llabs((micro_ms2 * 10) / SENSOR_G);
734
735 value = (int32_t) llvalue;
736
737 threshold.value = value;
738 threshold.enable = cfg->activity_th.enable;
739 threshold.referenced = cfg->activity_th.referenced;
740
741 switch (chan) {
742 case SENSOR_CHAN_ACCEL_X:
743 case SENSOR_CHAN_ACCEL_Y:
744 case SENSOR_CHAN_ACCEL_Z:
745 case SENSOR_CHAN_ACCEL_XYZ:
746 if (attr == SENSOR_ATTR_UPPER_THRESH) {
747 return adxl367_setup_activity_detection(dev, &threshold);
748 } else {
749 return adxl367_setup_inactivity_detection(dev, &threshold);
750 }
751
752 default:
753 LOG_ERR("attr_set() not supported on this channel");
754 return -ENOTSUP;
755 }
756 }
757
adxl367_attr_set_odr(const struct device * dev,enum sensor_channel chan,enum sensor_attribute attr,const struct sensor_value * val)758 static int adxl367_attr_set_odr(const struct device *dev,
759 enum sensor_channel chan,
760 enum sensor_attribute attr,
761 const struct sensor_value *val)
762 {
763 enum adxl367_odr odr;
764
765 switch (val->val1) {
766 case 12:
767 case 13:
768 odr = ADXL367_ODR_12P5HZ;
769 break;
770 case 25:
771 odr = ADXL367_ODR_25HZ;
772 break;
773 case 50:
774 odr = ADXL367_ODR_50HZ;
775 break;
776 case 100:
777 odr = ADXL367_ODR_100HZ;
778 break;
779 case 200:
780 odr = ADXL367_ODR_200HZ;
781 break;
782 case 400:
783 odr = ADXL367_ODR_400HZ;
784 break;
785 default:
786 return -EINVAL;
787 }
788
789 return adxl367_set_output_rate(dev, odr);
790 }
791
adxl367_attr_set(const struct device * dev,enum sensor_channel chan,enum sensor_attribute attr,const struct sensor_value * val)792 static int adxl367_attr_set(const struct device *dev,
793 enum sensor_channel chan,
794 enum sensor_attribute attr,
795 const struct sensor_value *val)
796 {
797 switch (attr) {
798 case SENSOR_ATTR_SAMPLING_FREQUENCY:
799 return adxl367_attr_set_odr(dev, chan, attr, val);
800 case SENSOR_ATTR_UPPER_THRESH:
801 case SENSOR_ATTR_LOWER_THRESH:
802 return adxl367_attr_set_thresh(dev, chan, attr, val);
803 default:
804 return -ENOTSUP;
805 }
806 }
807
adxl367_sample_fetch(const struct device * dev,enum sensor_channel chan)808 static int adxl367_sample_fetch(const struct device *dev,
809 enum sensor_channel chan)
810 {
811 struct adxl367_data *data = dev->data;
812 int ret;
813
814 ret = adxl367_get_accel_data(dev, &data->sample);
815 if (ret != 0) {
816 return ret;
817 }
818
819 return adxl367_get_temp_data(dev, &data->temp_val);
820 }
821
adxl367_accel_convert(const struct device * dev,struct sensor_value * val,int16_t value)822 static void adxl367_accel_convert(const struct device *dev,
823 struct sensor_value *val, int16_t value)
824 {
825 struct adxl367_data *data = dev->data;
826
827 int64_t micro_ms2 = value * (SENSOR_G * 250 / 10000 *
828 adxl367_scale_mul[data->range] / 1000);
829
830 val->val1 = micro_ms2 / 1000000;
831 val->val2 = micro_ms2 % 1000000;
832 }
833
adxl367_temp_convert(struct sensor_value * val,int16_t value)834 static void adxl367_temp_convert(struct sensor_value *val, int16_t value)
835 {
836 int64_t temp_data = (value + ADXL367_TEMP_OFFSET) * ADXL367_TEMP_SCALE;
837
838 val->val1 = temp_data / ADXL367_TEMP_SCALE_DIV;
839 val->val2 = temp_data % ADXL367_TEMP_SCALE_DIV;
840 }
841
adxl367_channel_get(const struct device * dev,enum sensor_channel chan,struct sensor_value * val)842 static int adxl367_channel_get(const struct device *dev,
843 enum sensor_channel chan,
844 struct sensor_value *val)
845 {
846 struct adxl367_data *data = dev->data;
847
848 switch (chan) {
849 case SENSOR_CHAN_ACCEL_X:
850 adxl367_accel_convert(dev, val, data->sample.x);
851 break;
852 case SENSOR_CHAN_ACCEL_Y:
853 adxl367_accel_convert(dev, val, data->sample.y);
854 break;
855 case SENSOR_CHAN_ACCEL_Z:
856 adxl367_accel_convert(dev, val, data->sample.z);
857 break;
858 case SENSOR_CHAN_ACCEL_XYZ:
859 adxl367_accel_convert(dev, val++, data->sample.x);
860 adxl367_accel_convert(dev, val++, data->sample.y);
861 adxl367_accel_convert(dev, val, data->sample.z);
862 break;
863 case SENSOR_CHAN_DIE_TEMP:
864 adxl367_temp_convert(val, data->temp_val);
865 default:
866 return -ENOTSUP;
867 }
868
869 return 0;
870 }
871
872 static const struct sensor_driver_api adxl367_api_funcs = {
873 .attr_set = adxl367_attr_set,
874 .sample_fetch = adxl367_sample_fetch,
875 .channel_get = adxl367_channel_get,
876 #ifdef CONFIG_ADXL367_TRIGGER
877 .trigger_set = adxl367_trigger_set,
878 #endif
879 };
880
adxl367_probe(const struct device * dev)881 static int adxl367_probe(const struct device *dev)
882 {
883 const struct adxl367_dev_config *cfg = dev->config;
884 struct adxl367_data *data = dev->data;
885 uint8_t dev_id, part_id;
886 int ret;
887
888 ret = adxl367_reset(dev);
889 if (ret != 0) {
890 return ret;
891 }
892
893 ret = data->hw_tf->read_reg(dev, ADXL367_DEVID, &dev_id);
894 if (ret != 0) {
895 return ret;
896 }
897 ret = data->hw_tf->read_reg(dev, ADXL367_PART_ID, &part_id);
898 if (ret != 0) {
899 return ret;
900 }
901
902 if (dev_id != ADXL367_DEVID_VAL || part_id != ADXL367_PARTID_VAL) {
903 LOG_ERR("failed to read id (0x%X:0x%X)\n", dev_id, part_id);
904 return -ENODEV;
905 }
906
907 data->range = cfg->range;
908
909 #ifdef CONFIG_ADXL367_TRIGGER
910 data->act_proc_mode = ADXL367_LINKED;
911 #else
912 data->act_proc_mode = ADXL367_LOOPED;
913 #endif
914
915 ret = adxl367_self_test(dev);
916 if (ret != 0) {
917 return ret;
918 }
919
920 ret = adxl367_temp_read_en(dev, cfg->temp_en);
921 if (ret != 0) {
922 return ret;
923 }
924
925 ret = adxl367_set_autosleep(dev, cfg->autosleep);
926 if (ret != 0) {
927 return ret;
928 }
929
930 ret = adxl367_set_low_noise(dev, cfg->low_noise);
931 if (ret != 0) {
932 return ret;
933 }
934
935 ret = adxl367_setup_activity_detection(dev, &cfg->activity_th);
936 if (ret != 0) {
937 return ret;
938 }
939
940 ret = adxl367_setup_inactivity_detection(dev, &cfg->inactivity_th);
941 if (ret != 0) {
942 return ret;
943 }
944
945 ret = adxl367_set_activity_time(dev, cfg->activity_time);
946 if (ret != 0) {
947 return ret;
948 }
949
950 ret = adxl367_set_inactivity_time(dev, cfg->inactivity_time);
951 if (ret != 0) {
952 return ret;
953 }
954
955 ret = adxl367_set_output_rate(dev, cfg->odr);
956 if (ret != 0) {
957 return ret;
958 }
959
960 ret = adxl367_fifo_setup(dev, cfg->fifo_config.fifo_mode,
961 cfg->fifo_config.fifo_format,
962 cfg->fifo_config.fifo_read_mode,
963 cfg->fifo_config.fifo_samples);
964 if (ret != 0) {
965 return ret;
966 }
967
968 if (IS_ENABLED(CONFIG_ADXL367_TRIGGER)) {
969 ret = adxl367_init_interrupt(dev);
970 if (ret != 0) {
971 LOG_ERR("Failed to initialize interrupt!");
972 return -EIO;
973 }
974 }
975
976 ret = adxl367_set_op_mode(dev, cfg->op_mode);
977 if (ret != 0) {
978 return ret;
979 }
980
981 ret = adxl367_set_range(dev, data->range);
982 if (ret != 0) {
983 return ret;
984 }
985
986 return adxl367_set_act_proc_mode(dev, data->act_proc_mode);
987 }
988
adxl367_init(const struct device * dev)989 static int adxl367_init(const struct device *dev)
990 {
991 int ret;
992 const struct adxl367_dev_config *cfg = dev->config;
993
994 ret = cfg->bus_init(dev);
995 if (ret != 0) {
996 LOG_ERR("Failed to initialize sensor bus\n");
997 return ret;
998 }
999
1000 return adxl367_probe(dev);
1001 }
1002
1003 #if DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 0
1004 #warning "ADXL367 driver enabled without any devices"
1005 #endif
1006
1007 /*
1008 * Device creation macro, shared by ADXL367_DEFINE_SPI() and
1009 * ADXL367_DEFINE_I2C().
1010 */
1011
1012 #define ADXL367_DEVICE_INIT(inst) \
1013 SENSOR_DEVICE_DT_INST_DEFINE(inst, \
1014 adxl367_init, \
1015 NULL, \
1016 &adxl367_data_##inst, \
1017 &adxl367_config_##inst, \
1018 POST_KERNEL, \
1019 CONFIG_SENSOR_INIT_PRIORITY, \
1020 &adxl367_api_funcs);
1021
1022 #ifdef CONFIG_ADXL367_TRIGGER
1023 #define ADXL367_CFG_IRQ(inst) \
1024 .interrupt = GPIO_DT_SPEC_INST_GET(inst, int1_gpios),
1025 #else
1026 #define ADXL367_CFG_IRQ(inst)
1027 #endif /* CONFIG_ADXL367_TRIGGER */
1028
1029 #define ADXL367_CONFIG(inst) \
1030 .odr = DT_INST_PROP(inst, odr), \
1031 .autosleep = false, \
1032 .low_noise = false, \
1033 .temp_en = true, \
1034 .range = ADXL367_2G_RANGE, \
1035 .activity_th.value = CONFIG_ADXL367_ACTIVITY_THRESHOLD, \
1036 .activity_th.referenced = \
1037 IS_ENABLED(CONFIG_ADXL367_REFERENCED_ACTIVITY_DETECTION_MODE), \
1038 .activity_th.enable = \
1039 IS_ENABLED(CONFIG_ADXL367_ACTIVITY_DETECTION_MODE), \
1040 .activity_time = CONFIG_ADXL367_ACTIVITY_TIME, \
1041 .inactivity_th.value = CONFIG_ADXL367_INACTIVITY_THRESHOLD, \
1042 .inactivity_th.referenced = \
1043 IS_ENABLED(CONFIG_ADXL367_REFERENCED_INACTIVITY_DETECTION_MODE),\
1044 .inactivity_th.enable = \
1045 IS_ENABLED(CONFIG_ADXL367_INACTIVITY_DETECTION_MODE), \
1046 .inactivity_time = CONFIG_ADXL367_INACTIVITY_TIME, \
1047 .fifo_config.fifo_mode = ADXL367_FIFO_DISABLED, \
1048 .fifo_config.fifo_format = ADXL367_FIFO_FORMAT_XYZ, \
1049 .fifo_config.fifo_samples = 128, \
1050 .fifo_config.fifo_read_mode = ADXL367_14B_CHID, \
1051 .op_mode = ADXL367_MEASURE,
1052
1053 /*
1054 * Instantiation macros used when a device is on a SPI bus.
1055 */
1056
1057 #define ADXL367_CONFIG_SPI(inst) \
1058 { \
1059 .bus_init = adxl367_spi_init, \
1060 .spi = SPI_DT_SPEC_INST_GET(inst, SPI_WORD_SET(8) | \
1061 SPI_TRANSFER_MSB, 0), \
1062 ADXL367_CONFIG(inst) \
1063 COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, int1_gpios), \
1064 (ADXL367_CFG_IRQ(inst)), ()) \
1065 }
1066
1067 #define ADXL367_DEFINE_SPI(inst) \
1068 static struct adxl367_data adxl367_data_##inst; \
1069 static const struct adxl367_dev_config adxl367_config_##inst = \
1070 ADXL367_CONFIG_SPI(inst); \
1071 ADXL367_DEVICE_INIT(inst)
1072
1073 /*
1074 * Instantiation macros used when a device is on an I2C bus.
1075 */
1076
1077 #define ADXL367_CONFIG_I2C(inst) \
1078 { \
1079 .bus_init = adxl367_i2c_init, \
1080 .i2c = I2C_DT_SPEC_INST_GET(inst), \
1081 ADXL367_CONFIG(inst) \
1082 COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, int1_gpios), \
1083 (ADXL367_CFG_IRQ(inst)), ()) \
1084 }
1085
1086 #define ADXL367_DEFINE_I2C(inst) \
1087 static struct adxl367_data adxl367_data_##inst; \
1088 static const struct adxl367_dev_config adxl367_config_##inst = \
1089 ADXL367_CONFIG_I2C(inst); \
1090 ADXL367_DEVICE_INIT(inst)
1091 /*
1092 * Main instantiation macro. Use of COND_CODE_1() selects the right
1093 * bus-specific macro at preprocessor time.
1094 */
1095
1096 #define ADXL367_DEFINE(inst) \
1097 COND_CODE_1(DT_INST_ON_BUS(inst, spi), \
1098 (ADXL367_DEFINE_SPI(inst)), \
1099 (ADXL367_DEFINE_I2C(inst)))
1100
1101 DT_INST_FOREACH_STATUS_OKAY(ADXL367_DEFINE)
1102
