Home
last modified time | relevance | path

Searched defs:denom (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.c685 …PLL_Type *base, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_… in ANATOP_PllConfigure()
1297 double denom; in CLOCK_GetAudioPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.c685 …PLL_Type *base, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_… in ANATOP_PllConfigure()
1297 double denom; in CLOCK_GetAudioPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.c685 …PLL_Type *base, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_… in ANATOP_PllConfigure()
1297 double denom; in CLOCK_GetAudioPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.c685 …PLL_Type *base, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_… in ANATOP_PllConfigure()
1297 double denom; in CLOCK_GetAudioPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c676 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1487 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c676 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1487 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c682 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1478 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c676 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1487 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c676 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1487 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c676 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1487 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c682 …anatop_ai_itf_t itf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pl… in ANATOP_PllConfigure()
1478 double denom; in CLOCK_GetAvPllFreq() local
/hal_nxp-latest/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW40Z4/
DKW4xXcvrDrv.c1859 int32_t denom = 0x04000000; in XcvrOverrideFrequency() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/
Dfsl_clock.h1450 uint32_t denom : 30; /*!< 30-bit denominator of the PLL1 Fractional-Loop divider. */ member
1485 uint32_t denom : 30; /*!< 30-bit denominator of the PLL4 Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/
Dfsl_clock.h1450 uint32_t denom : 30; /*!< 30-bit denominator of the PLL1 Fractional-Loop divider. */ member
1485 uint32_t denom : 30; /*!< 30-bit denominator of the PLL4 Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/
Dfsl_clock.h1450 uint32_t denom : 30; /*!< 30-bit denominator of the PLL1 Fractional-Loop divider. */ member
1485 uint32_t denom : 30; /*!< 30-bit denominator of the PLL4 Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/
Dfsl_clock.h1450 uint32_t denom : 30; /*!< 30-bit denominator of the PLL1 Fractional-Loop divider. */ member
1485 uint32_t denom : 30; /*!< 30-bit denominator of the PLL4 Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/
Dfsl_clock.h1450 uint32_t denom : 30; /*!< 30-bit denominator of the PLL1 Fractional-Loop divider. */ member
1485 uint32_t denom : 30; /*!< 30-bit denominator of the PLL4 Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h864 uint32_t denom : 30; /*!< 30-bit denominator of the Auxiliary PLL Fractional-Loop divider. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h864 uint32_t denom : 30; /*!< 30-bit denominator of the Auxiliary PLL Fractional-Loop divider. */ member